Assembler and simulators

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8085 Assembler And Simulators

Introduction

The 8085 had a very long life as a controller. Once designed into such products as the DECtape controller and the VT100 video terminal in the late 1970s, it continued to serve for new production throughout the life span of those products (generally many times longer than the new manufacture lifespan of desktop computers)

The 8085 is a conventional von Neumann design based on the Intel 8080. Unlike the 8080 it had no state signals multiplexed onto the data bus, but the 8-bit data bus was instead multiplexed with the lower part of the 16-bit address bus (in order to limit the number of pins to 40). The processor was designed using nMOS circuitry and the later "H" versions were implemented in Intel's enhanced nMOS process called HMOS, originally developed for fast static RAM products. The 8085 used approximately 6,500 transistors.

The 8085 incorporated the functionality of the 8224 (clock generator) and the 8228 (system controller), increasing the level of integration. A downside compared to similar contemporary designs (such as the Z80) was the fact that the buses required demultiplexing, however, address latches in the Intel 8155, 8355, and 8755 memory chips allowed a direct interface, so an 8085 along with these chips was almost a complete system.

The 8085 had extensions to support new interrupts: It had three maskable interrupts (RST 7.5, RST 6.5 and RST 5.5), one Non-Maskable interrupt (TRAP), and one externally serviced interrupt (INTR). The RST n.5 interrupts refer to actual pins on the processor-a feature which permitted simple systems to avoid the cost of a separate interrupt controller.

Like the 8080, the 8085 could accommodate slower memories through externally generated wait states (pin 35, READY), and had provisions for Direct Memory Access (DMA) using HOLD and HLDA signals (pins 39 and 38). An improvement over the 8080 was that the 8085 can itself drive a piezoelectric crystal directly connected to it, and a built in clock generator generates the internal high amplitude two-phase clock signals at half the crystal frequency (a 6.14 MHz crystal would yield a 3.07 MHz clock for instance).

Assembler

Typically a modern assembler creates object code by translating assembly instruction mnemonics into opcodes, and by resolving symbolic names for memory locations and other entitie. The use of symbolic references is a key feature of assemblers, saving tedious calculations and manual address updates after program modifications. Most assemblers also include macro facilities for performing textual substitution—e.g., to generate common short sequences of instructions to run inline, instead of in a subroutine.

Assemblers are generally simpler to write than compilers for high-level languages, and have been available since the 1950s. Modern assemblers, especially for RISC based architectures, such as MIPS, Sun SPARC, and HP PA-RISC, as well as x86(-64), optimize instruction scheduling to exploit the CPU pipeline efficiently.

There are two types of assemblers based on how many passes through the source are needed to produce the executable program. One-pass assemblers go through the source code once and assumes that all symbols will be defined before any instruction that references them. Two-pass assemblers (and multi-pass assemblers) create a table with all unresolved symbols in the first pass, then use the 2nd pass to resolve these addresses. The advantage in one-pass assemblers is speed, which is not as important as it once was with advances in computer speed and capabilities. The advantage of the two-pass assembler is that symbols can be defined anywhere in the program source. As a result, the program can be defined in a more logical and meaningful way. This makes two-pass assembler programs easier to read and maintain.

More sophisticated high-level assemblers provide language abstractions such as:

  • Advanced control structures
  • High-level procedure/function declarations and invocations
  • High-level abstract data types, including structures/records, unions, classes, and sets
  • Sophisticated macro processing
  • Object-Oriented features such as encapsulation, polymorphism, inheritance, interfaces

See Language design below for more details.

Note that, in normal professional usage, the term assembler is often used ambiguously: It is frequently used to refer to an assembly language itself, rather than to the assembler utility. Thus: "CP/CMS was written in S/360 assembler" as opposed to "ASM-H was a widely-used S/370 assembler."

A modern assembler creates object code by translating assembly instruction mnemonics into opcodes, and by resolving symbolic names for memory locations and other entities. The use of symbolic references is a key feature of assemblers, saving tedious calculations and manual address updates after program modifications. Most assemblers also include macro facilities for performing textual substitution—e.g., to generate common short sequences of instructions to run inline, instead of in a subroutine.

Assemblers are generally simpler to write than compilers for high-level languages, and have been available since the 1950s. Modern assemblers, especially for RISC based architectures, such as MIPS, Sun SPARC, and HP PA-RISC, optimize instruction scheduling to exploit the CPU pipeline efficiently.

There are two types of assemblers based on how many passes through the source are needed to produce the executable program. One-pass assemblers go through the source code once and assumes that all symbols will be defined before any instruction that references them. Two-pass assemblers (and multi-pass assemblers) create a table with all unresolved symbols in the first pass, then use the 2nd pass to resolve these addresses. The advantage in one-pass assemblers is speed, which is not as important as it once was with advances in computer speed and capabilities. The advantage of the two-pass assembler is that symbols can be defined anywhere in the program source. As a result, the program can be defined in a more logical and meaningful way. This makes two-pass assembler programs easier to read and maintain.

Assembly Language

A program written in assembly language consists of a series of instructions--mnemonics that correspond to a stream of executable instructions, when translated by an assembler, that can be loaded into memory and executed.

For example, an x86/IA-32 processor can execute the following binary instruction as expressed in machine language (see x86 assembly language):

Binary: 10110000 01100001 (Hexadecimal: B0 61)

The equivalent assembly language representation is easier to remember (example in Intel syntax, more mnemonic):

MOV AL, 61h

This instruction means:

Move the value 61h (or 97 decimal; the h-suffix means hexadecimal; into the processor register named "AL".

The mnemonic "mov" represents the opcode 1011 which moves the value in the second operand into the register indicated by the first operand. The mnemonic was chosen by the instruction set designer to abbreviate "move", making it easier for the programmer to remember. A comma-separated list of arguments or parameters follows the opcode; this is a typical assembly language statement.

In practice many programmers drop the word mnemonic and, technically incorrectly, call "mov" an opcode. When they do this they are referring to the underlying binary code which it represents. To put it another way, a mnemonic such as "mov" is not an opcode, but as it symbolizes an opcode, one might refer to "the opcode mov" for example when one intends to refer to the binary opcode it symbolizes rather than to the symbol -- the mnemonic -- itself. As few modern programmers have need to be mindful of actually what binary patterns are the opcodes for specific instructions, the distinction has in practice become a bit blurred among programmers but not among processor designers.

Transforming assembly into machine language is accomplished by an assembler, and the reverse by a disassembler. Unlike in high-level languages, there is usually a one-to-one correspondence between simple assembly statements and machine language instructions. However, in some cases, an assembler may provide pseudoinstructions which expand into several machine language instructions to provide commonly needed functionality. For example, for a machine that lacks a "branch if greater or equal" instruction, an assembler may provide a pseudoinstruction that expands to the machine's "set if less than" and "branch if zero (on the result of the set instruction)". Most full-featured assemblers also provide a rich macro language (discussed below) which is used by vendors and programmers to generate more complex code and data sequences.

Each computer architecture and processor architecture has its own machine language. On this level, each instruction is simple enough to be executed using a relatively small number of electronic circuits. Computers differ by the number and type of operations they support. For example, a new 64-bit machine would have different circuitry from a 32-bit machine. They may also have different sizes and numbers of registers, and different representations of data types in storage. While most general-purpose computers are able to carry out essentially the same functionality, the ways they do so differ; the corresponding assembly languages reflect these differences.

Multiple sets of mnemonics or assembly-language syntax may exist for a single instruction set, typically instantiated in different assembler programs. In these cases, the most popular one is usually that supplied by the manufacturer and used in its documentation

Assembler source code information

The assembly language source code file must consist of a series of lines of text. Each line may consist of up to four fields as follows:

<Label> <Opcode> <Operand> <Comment>

The fields must be separated from each other by space or tab characters and reference in the following paragraphs to a space means either a space or a tab character.

All statements up to the end of the file will be assembled unless the END directive is encountered.

The label field starts at the beginning of the line with no preceding spaces.

Label fields

Labels (or symbols) may be any length consistent with the maximum line length of 255 character.

Allowable characters for labels (or symbols) are:

Upper case characters

A to Z

Lower case characters

a to z

Digits

0 to 9

(Except first character)

Period

.

Underline

_

Dollar

$

(Except first character)

Ampersand

@

(Except first character)

Query

?

Symbols are case sensitive and so the cross-assembler distinguishes between upper and lower case characters.

Digits, the dollar and the ampersand are not allowed to be the first character of the symbol (otherwise they would be confused with numbers).

The use of symbols beginning with a period and consisting then only of digits (eg .13) is not recommended since the assembler generates symbol names of this format when expanding macros.

Labels beginning with a period followed by an ampersand (ie .@xxxx) are also special. They are regarded by the cross-assembler as being local to the file in which they are located. Thus the names can be reused in other included files without the duplicate label error occurring.

There are a number of other symbols used by the assembler. Use of these as labels could confuse the evaluation of the operand field. They are therefore reserved and their presence in the label field will generate an error. The reserved symbols are:

A, B, C, D, E, H, L, M, SP, PSW, NARG

in either upper or lower case.

Symbols being used as a macro names, must not be the same as a microprocessor instruction mnemonic or an assembler directive. A check is carried out by the cross assembler to prevent this.

A symbol can only be defined once unless it was defined using the SET directive.

For some directives, the presence of a symbol in the label field is compulsory. These are:

EQU, SET, MACR

Also some operation directives do not allow a label to be present. These are:

END, ENDC, ENDM, FAIL, IFcc, NAM, OPT, ORG, SPC, TTL, INCLUDE, CLIST, NOCLIST, MC, NOMC, MD, NOMD, MEX, NOMEX, OBJ, NOOBJ, PAGE, NOPAGE, SEQON, NOSEQ, SYM, UNA, NOUNA, LIST, NOLIST, SREC, BIN, LISTF

Operation Field

If a label is present then the assembler assumes that the field following the label is the operation field. The operation field must be separated from the label by one or more spaces.

If no label is present then the operation field must be preceded at the start of the line by at least one space.

The operation code may be a microprocessor executable instruction (opcode mnemonic), an assembler directive (pseudo-op) or a macro instruction.

Opcode mnemonics and directives are case insensitive and lower and upper case characters can be freely intermixed. Macro names are however case sensitive.

Operand Field

The operand field follows the operation field separated by one or more spaces. Whether or not an operand is required will depend upon the particular operation specified.

The characters of the operand field must not be separated by any spaces since these indicate the end of the operand field. There are two exceptions to this rule. The first is with macro arguments where a space can be included within an argument providing the argument is enclosed within brackets. The other is with the TTL directive when spaces are allowed in the operand (but in this case no comment field is allowed).

Comment Field

The comment field follows the operand field or if an operand field is not required by the operation, it follows the operation field. It is separated from the operand or opcode by one or more spaces and must start with a semi-colon. The comment field may contain any number of spaces.

The assembler ignores the comment field except when sending the assembly listing to the list device.

Care should be taken not to accidentally include a space character in the operand since the rest of the operand will then be treated as the comment field and ignored. This will often generate an assembly error because the operand is not correct. However, if the part of the operand preceding the space character is a correct operand in its own right then an error message will not be generated.

Simulators

8085 simulators exist aplenty for educational use. Freely available open source variants include GNUSim8085 and GSim85 working on both, GNU/Linux and Windows, a freely available web based simulator (including assembler) can be found here. Closed source freeware simulators for the Microsoft Win32 platform include Win85 (which also emulates undocumented operations of the chip) and Sim8085

8085 Simulator has a very user friendly interface & the best part is, its FREE to download. You can master 8085 simulator programming in matter of days now. This 8085 simulator offers full graphical illustration of the Microprocessor.Salient featurescan be gauged as follows.

  • The Coding input is very easythrough a Code Key Pad
  • It operates on theprinciple of total input validation. User is guided all along by this well designed and intelligent software, to a stage that we can say that it is almost impossible to make a mistake.
  • Itconstantly displays the contentsof all the memory locations.
  • The software packageincludes a built in assemblerthat translates the given mnemonic code into machine code.
  • This package includesprovision for saving & opening coding files, so that you don't have to key the same data over and over again & so you can also keep the data for future reference.
  • It offers easy and extensive debuggingincluding Breakpoints & Single Step running.
  • This program supportscomplete transparency of registers,RAM memory, IO Memory & status flags just as it should be.
  • It has provision to add" Interrupt Service Routines "(ISR) and other subroutines so it beats other softwares in this regard.
  • It comes with adetailed Help Fileincluded with in this package.
  • The packagechanges background colorsin accordance to the user selected themes unlike some of the available programs
  • Thesize of softwareis very less and the only reason its jumping above 1 MB is VB run time files..
  • Allupgrades to the Future versionswill be free

Study of Microprocessor is a part of the most Engineering Curriculums. Using a board having a Keypad does the practical study. But the difficulties encountered in using this hardware (board) are as follows:

  • Since we are working with hardware there is always a chance that it may fail.
  • The keypad allows us to enter only hexadecimal values. That forces us to manually determine opcode for all the instructions before proceeding. That can be tiresome.
  • It is not possible to view the status of all the registers simultaneously.

In order to overcome the above difficulties, this software solution is developed that is very user friendly
and operationally similar to the hardware counterpart.

Simulator will be of utmost help to students who are willing to learn more about 8085 programming but don't have the hardware to help them.
Simulator can be put to commercial use, if one deals with 8085 Microprocessor

Program memory - program can be located anywhere in memory. Jump, branch and call instructions use 16-bit addresses, i.e. they can be used to jump/branch anywhere within 64 KB. All jump/branch instructions use absolute addressing.

Data memory - the processor always uses 16-bit addresses so that data can be placed anywhere.

Stack memory is limited only by the size of memory. Stack grows downward.

First 64 bytes in a zero memory page should be reserved for vectors used by RST instructions.

Interrupts

The processor has 5 interrupts. They are presented below in the order of their priority (from lowest to highest):

INTR is maskable 8080A compatible interrupt. When the interrupt occurs the processor fetches from the bus one instruction, usually one of these instructions:

  • One of the 8 RST instructions (RST0 - RST7). The processor saves current program counter into stack and branches to memory location N 8 (where N is a 3-bit number from 0 to 7 supplied with the RST instruction).
  • CALL instruction (3 byte instruction). The processor calls the subroutine, address of which is specified in the second and third bytes of the instruction.

RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.

RST6.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34h (hexadecimal) address.

RST7.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.

Trap is a non-maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 24h (hexadecimal) address.

All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5 and RST7.5 interrupts can be enabled or disabled individually using SIM instruction.

I/O PORTS

256 Input ports & 256 Output ports

Registers

Accumulator or A register is an 8-bit register used for arithmetic, logic, I/O and load/store operations.

Flag is an 8-bit register containing 5 1-bit flags:

  • Sign - set if the most significant bit of the result is set.
  • Zero - set if the result is zero.
  • Auxiliary carry - set if there was a carry out from bit 3 to bit 4 of the result.
  • Parity - set if the parity (the number of set bits in the result) is even.
  • Carry - set if there was a carry during addition, or borrow during subtraction/comparison.

General registers:

  • 8-bit B and 8-bit C registers can be used as one 16-bit BC register pair. When used as a pair the C register contains low-order byte. Some instructions may use BC register as a data pointer.
  • 8-bit D and 8-bit E registers can be used as one 16-bit DE register pair. When used as a pair the E register contains low-order byte. Some instructions may use DE register as a data pointer.
  • 8-bit H and 8-bit L registers can be used as one 16-bit HL register pair. When used as a pair the L register contains low-order byte. HL register usually contains a data pointer used to reference memory addresses.

Stack pointer is a 16 bit register. This register is always incremented / decremented by 2.

Program counter is a 16-bit register.

Instruction Set

8085 instruction set consists of the following instructions:

  • Data moving instructions.
  • Arithmetic - add, subtract, increment and decrement.
  • Logic - AND, OR, XOR and rotate.
  • Control transfer - conditional, unconditional, call subroutine, return from subroutine and restarts.
  • Input/Output instructions.
  • Other - setting/clearing flag bits, enabling/disabling interrupts, stack operations, etc.

Addressing Modes

Register - references the data in a register or in a register pair.

Register indirect - instruction specifies register pair containing address, where the data is located.

Direct.

Refrences

1.WWW.WIKIPEDIA.COM/ASSEMBLER

+SIMULATERS

2.WWW.GOOGLE.COM/ASSEMBLER

3.DOUGLUS B HALL 4 EDITION

4.RAMESH GOANKER

5.US SHAH

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