The overall objective of our senior design proposal is to continue the work of the senior design spring 2005 students. Our senior design project will be to design and simulate an open loop, regenerative braking control system for the fuel cell vehicle. The main components of the system are the FPGA, the microprocessor, and the high current 3-phase inverter. The inverter will be employed in an FPGA circuit to create a 3-phase signal in which to run the AC motor. A microprocessor will be used as an A/D converter and a frequency range generator which will supply values for the FPGA. The inverter will need to handle an average power of 34kW from the AC motor as well as current draws of 240A and voltages of 220V Line to Line.
So what exactly is regenerative braking? Regenerative braking is when the brakes are applied energy is produced, usually in the form of heat, and that energy is stored back into the motor. When acceleration is performed again that energy is transferred from the motor to the engine. The way that regenerative braking works is by electrically switching motors to act as generators that convert motion into electricity instead of electricity into motion.
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What is one of the main causes of carbon monoxide in the world, as we know it today? The EPA estimates that at least 60% of the carbon monoxide in the atmosphere is due to automobiles use of fossil fuels . Our long term goal is to build a fuel cell car that will be an option for consumer use in the future. In a fuel cell powered car there are two byproducts, electricity and water. This is done using a gaseous fuel, typically hydrogen, and an oxidant, typically oxygen. As shown in figure 1, hydrogen is continuously fed across a catalyst attached to the anode, and through an electrochemical process electrons are freed from the hydrogen, making them available for conduction through an electric circuit. Oxygen is fed across the cathode that conducts the electrons back from the circuit, which are recombined with hydrogen ions and oxygen to form water, thereby completing the circuit. Individual fuel cells are combined into a stack and connected in series to provide an output voltage necessary for a given task .
Figure 1: The basic model of a fuel cell 
http://www.fuelcells.org/fuelcells_files/how_diagram.jpg There are fuel cell cars that are running right now and most of them are in California. Recently there was an auto show on television and they were showing a Mercedes Benz that ran on both gasoline and hydrogen. One of the reasons why there are not more cars running off of hydrogen instead of gasoline is due to the fact that there aren't fueling stations nationwide yet. California is the only state with fueling stations and even those are few and far between. BMW is also working on a car that will be released to the public in a few years that uses hydrogen as one of its main energy source components called the BMW 750hl. The BMW Clean Energy system involves liquid hydrogen produced from water using solar power .
There are several aspects that have to be worked on to get the car up and running. So far the car has been completely stripped, with the engine and transmission already out of the car. The Solectria AC-55 motor has been received, and the pin outs from the motor are currently being tested.
IV. Design Method
The overall design of the project is to set up a control system based on the Digilent D2FT FPGA (Field Programmable Gate Array) and the Motorola 68hc11EVB microprocessor. From the general block diagram outline of the control system (see Figure 2) a variable DC voltage will be an input to the microprocessor. The 68hc11 will execute an A/D conversion, scale the digital input, and perform the necessary calculations to obtain slip frequencies. The output will run to the FPGA. On the FPGA the input will be transformed using SVM (Space Vector Modulation) to provide the correct modulating index to provide the proper timing sequence of the 6MBI300U-120 3-phase inverter. The outputs from the FPGA will be scaled using electric drivers and then run directly to each MOSFET switch on the inverter. The goal will be to have the system together by the end of the semester to be ready to test on some dummy loads, the 1/3 horse power motor in the ELE 340 lab, and eventually the AC Solectria AC55 motor for the fuel cell vehicle in the fuel cell lab.
A. FPGA Design
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The Digilent D2FT FPGA will be used to create the correct timing sequence of the six inverter switches (see figure 3). To create the proper switching sequence SVM will be used. The rotating space vector in SVM is a digital implementation which is equivalent to an analog pulse width modulation (PWM) technique.
Figure 3: Possible Switching Operations [SVM]
In the implementation of SVM a rotating space vector will emulate a physical signal to determine each switching period to generate a time-averaged sine wave signal at the output of the inverter. The space vector travels through 6 sectors (see figure 4) each of which are 60 degrees. Sectors 0 and 7 are on the origin. Selecting a vector sequence that will minimize the amount of switching per sector, a general format is used. A general vector sequence is Vz,Vn,Vn+1,Vz (where Vz is alternately chosen between V0 and V7) [green book]. From the derivation of the periods for SVM gives:
T1 = Ts*m*sin(Ð¤) (1)
T2 = Ts*m*sin(60Û«-Ð¤) (2)
T0 = Ts - T1 - T2 (3)
Where Ts is the switching frequency of the inverter, m is the modulation index, and Ð¤ is the angle from the current sector to the next. For the switching frequency we chose fs=6*4000 Hz for an equal number of sectors per division. The modulation index will fall between 0.1 and 0.8. The phi is calculated by normalizing the frequency and multiplying by the time resolution step of 1step/degree. To calculate the periods requires a sine function so a digital numerical method is required.
For implementing a rotating space vector in digital hardware two options are currently available. One is to use a CORDIC (Coordinate Rotation Digital Computer) algorithm to implement an iterative process that will accurately represent a sine wave within our bit-length resolution. The other is numerical step method resembling a power series expansion. The choice for implementing the CORDIC algorithm is in its simplicity. The only operations required are additions, subtractions, and shifts of 2's complement bit numbers. For the construction of the design of the CORDIC algorithm Verilog-HDL will be the software programming language used. The Xillinx and ModelSim software package will also be used to generate timing diagrams as well as streamline the design to assign package pins and optimize timing sequences on the D2FT board.
Figure 4: Space Vector Representation [SVM]
B. Microprocessor Programming
The programming for the project will all be done using the Motorola 68hc11EVB microprocessor. Ideally the input to the microprocessor will be a supplied DC voltage from the fuel cell which is stepped down to a desired magnitude using a buck converter of some sort. Since it is not possible yet for that kind of implementation, a DC power supply will be used for the analog input instead. A range of analog voltage values will represent input torque magnitudes which in turn will need to be converted to digital values. After each input is converted, they must be multiplied by the motor torque constant in order to get a range of slip speed values. The motor torque constant was calculated using the rated plate values on the AC motor in the ELE 340 lab. The reason for using these values was because the company Solectria did not know exactly what the specifications were for the AC55 motor without the control system. This slowed the progress of the project until the decision was made to use the values of the AC motor in the ELE 340 lab. The result of the input torque magnitude times the motor torque constant must be scaled by (1/2Ï€) in order to obtain a range of slip frequency values rather than slip speed values. After the range of slip frequency values is obtained they must be scaled again by 1/5. This is to represent the slip frequencies in a 0 to 60 hertz range and make the values causal. The values will then be saved to an output port in the microprocessor and fed into the FPGA for the use of further calculations needed to complete the control system circuit.
A. Microprocessor Results
There was a limited amount of results for the microprocessor implementation portion of the project. The Motorola 68hc11EVB board that was obtained had missing components which hindered the ability to physically test the program. There was also software loading problems in the labs which also prohibited the capability of creating simulated results. Also there was an extreme limitation of access to the lab that could have been used to obtain results on the account of inadequate space to work due to ongoing classes during the summer. There were, however, calculated values and projected results that could be obtained using the written 68hc11 program confirmed in appendix A. Until a working 68hc11 board with software is purchased in the future, there is little hardware testing that can be done. In the meantime, however, the FPGA can be tested by using the projected binary results found in appendix A and implementing those results by means of a dip switch. This way the entire control system design process for the future will not be delayed due to the absence of a microprocessor board.
B. FPGA Results
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All results and tables that pertain to the CORDIC algorithm are included in appendix B. All results that pertain to the Schematics and Verilog code are included in appendix C.
Overall the senior design project is the design and simulation of an open loop, regenerative braking control system for the fuel cell vehicle. The system includes the Digilent D3FT FPGA, the Motorola 68hc11EVB microprocessor, and the 6MBI300U-120 3-phase inverter. The inverter will be employed in an FPGA circuit to create a 3-phase signal in which to run the AC motor. The microprocessor will be used as an A/D converter and a frequency range generator which will supply values for the FPGA. With the exception of the lack of hardware for physical implementation and testing, the goal of this project has been accomplished. With the information and tools created from this project, the overall fuel cell vehicle design has made great strides toward the final destination. With the addition of up and coming seniors to continue the project design, the long term goal will certainly be accomplished. APPENDIX A
Plate values for AC Motor:
Poles (P): 4
Calculations for motor characteristic variables:
Prated = 745.6999 W/H.P. * (1/3) = 248.57 W
Ï‰e,rated = 2Ï€fe= 2Ï€(60) = 377 rad/s
Ï‰m,rated = (2Ï€(RPM)/60)*(P/2) = (2Ï€(1750)/60)*(4/2) = 366.52 rad/s
Ï‰m = Ï‰m,rated/(P/2) = 366.52/(4/2) = 183.26
Tm,rated = Prated /Ï‰m = 248.57/183.26 = 1.356 Nm
Kt = Tm,rated/(Ï‰e,rated - Ï‰m,rated)
= 0.129 Nm/(rad/s) => torque constant
1/Kt = 7.729 (rad/s)/Nm
Slip speed and frequency:
Variable analog input of control system = Ta
Ï‰slip = Ta*(1/Kt) = Ta*(7.729) rad/s
Ï‰slip = 2Ï€fslip
fslip = Ta*(1/(2Ï€Kt)) = Ta*(7.729/2Ï€) = Ta*1.23 â‰ˆ (Ta*1.25) Hz
The program for the 68hc11 requires a digital representation of variable analog inputs from a DC source. This is done with an 8-bit A/D converter included on the 68hc11EVB board. The A/D converter hardware takes in a range of 0-5 volts and assigns binary values for each ranging from 0 to 255, where 0 volts equals 0 and 5 volts or higher equals 255. The program must take these digital values and multiply them by 1.25 in order to obtain the slip frequency (fslip = Ta*1.25), then output these values to an 8-bit port which will be fed to an FPGA. The digital slip frequency values will be represented in binary from 0 to 60(hertz).
Some calculated frequency values:
Analog (Ta) Digital (radix 2)
0 V => 00000000 (0)
5 V => 11111111 (255)
2.5 V => 01111111 (127)
3.75 V => 10111111 (191)
Ta = 5 V:
000011111111 (255) "Ta"
+ 000000111111 (63) "Ta*0.25"
= 000100111110 318 "Ta*1.25" => slip frequency fslip
Ta = 2.5 V:
000001111111 (127) "Ta"
+ 000000011111 (31) "Ta*0.25"
= 000010011110 158 "Ta*1.25" => slip frequency fslip
Ta = 3.75 V:
000010111111 (191) "Ta"
+ 000000101111 (47) "Ta*0.25"
= 000011101110 238 "Ta*1.25" => slip frequency fslip
The issue with these frequency results is that they are 12-bit numbers instead of 8-bit and they are not in the 0 to 60 hertz range that is needed. In order for the results to be useful they need to be scaled by one fifth, subsequently converting the 12-bit numbers to 8-bit and changing the frequency range from 0 to 300 hertz to 0 to 60 hertz approximately. So (fslip = Ta*1.25) will change to (fslip = Ta*0.25).
Some calculated frequency values with new slip frequency equation:
Analog (Ta) Digital (radix 2)
0 V => 00000000 (0)
5 V => 11111111 (255)
2.5 V => 01111111 (127)
3.75 V => 10111111 (191)
Ta = 5 V:
11111111 (255) "Ta"
01111111 (127) "Ta*0.5"
00111111 63 "Ta*0.25" => slip frequency fslip
Ta = 2.5 V:
01111111 (127) "Ta"
00111111 (63) "Ta*0.5"
00011111 31 "Ta*0.25" => slip frequency fslip
Ta = 3.75 V:
10111111 (191) "Ta"
01011111 (95) "Ta*0.5"
00101111 47 "Ta*0.25" => slip frequency fslip
The appropriate code for the Motorola 68hc11EVB microprocessor to acquire these slip frequencies is displayed and functionally commented in Figure A. The pin assignments for the 68hc11EVB board is as follows:
Pin 1 (GND) => connect to (Ground)
Pin 26 (VDD) => connect to (DC power supply)
Pin 51 (VRL) => connect to (Ground)
Pin 52 (VRH) => connect to (+5 volts)
;This program takes in a DC voltage range of 0 to 5 volts and converts those *
;analog values to 8-bit radix 2 binary values. Those binary values are *
;converted to a 0 to 60 hertz frequency range by means of a torque constant *
;and a scaling factor. The 8-bit results are stored in the output port B *
RAM_START EQU 0
RAM_SIZE EQU 256
RAM_END EQU RAM_START+RAM_SIZE-1
ROM_END EQU $0FFFF
KILO EQU 1024
ROM_SIZE EQU 12*KILO
ROM_START EQU ROM_END-ROM_SIZE+1
; Define some I/O registers
PORTB EQU $1004
BAUD EQU $102B
SCCR1 EQU $102C
SCCR2 EQU $102D
SCSR EQU $102E
SCDR EQU $102F
ADCTL EQU $1030
ADR1 EQU $1031
ADR2 EQU $1032
ADR3 EQU $1033
ADR4 EQU $1034
OPTION EQU $1039
lds RAM_END ;INITIALIZE THE STACK
clr PORTB ;clear out garbage values in output port B
clr ADR1 ;clear out garbage values in A/D result registers
ldaa #%10000000 ;bit 7 to set ADPU in OPTION register
oraa OPTION ;set ADPU bit to 1
staa OPTION ;turn on A/D converter
ldaa #%00100000 ;bit 5 to set SCAN in ADCTL register
oraa ADCTL ;set SCAN bit to 1
staa ADCTL ;turn on constant scan for A/D converter
ldab ADR1 ;A/D converted value in B register
lsrb ;1/(5*kt*2*pi) times input approx. equals 1/4 times input
lsrb ;which equals the relative slip frequency of the motor.
;Therefore two lsr of input will give you this result. stab PORTB ;store slip frequency in output port B
bra BEGIN ;get next input
CORDIC TABLE: normalized frequency values at 1*10^6*f with initial starting frequency Z=1 Hz for the CORDIC rectangular to polar conversion.
Arctangent 32 bit lookup table for CORDIC implementation with
Schematics & Verilog
Development and Use of a Regenerative Braking Model for a
Parallel Hybrid Electric Vehicle
Journal & Paper No: SAE Paper 2000-01-0995
Proceedings of the Institution of Mechanical Engineers. Part D, Journal of Automobile Engineering, v. 216 noD11 (2002) p. 855-64. (illustrations) (Peer Reviewed Journal)
AUTHOR: Benjamin B. Ames
TITLE: Ford uses software tools to escape design hurdles
SOURCE: Design News v57 no16 p27 Ag 19 2002
AUTHOR: Bruce Wiebusch, Regional Editor
TITLE: Hydraulic regenerative braking improves large-scale trucks
SOURCE: Design News v57 no12 p69-70 Je 17 2002
AUTHOR: by Christina Lewis, Contributing Editor
TITLE: Hydraulic hybrids rev up low-energy technologies
SOURCE: Design News v57 no5 p50, 52 Mr 11 2002
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