Multilevel Inverter Fed Induction Motor Drive Engineering Essay

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This project presents the simulation and implementation of multilevel inverter fed induction motor drive. The output harmonic content is reduced by using multilevel inverter. In symmetrical circuit, the voltage and power increase with the increase in the number of levels of inverter. The switching angle for the pulse is selected in such way to reduce the harmonic distortion. This drive system has advantages like reduced total harmonic distortion and higher torque. The model of the multilevel inverter system is developed with SVM strategy to control the induction motor. The experimental results coincide with simulation results.

In this century, multilevel inverter technology becomes very important alternative in the field of low to high electrical power energy control. This project aims to present a simple model like using power MOSFET that controlled by PIC microcontroller to show that inversion is possible. Some other topologies of multilevel inverter like asymmetric hybrid cells and soft-switched multilevel inverters will be discussed in literature review. This project also presents relevant control circuit and literature review on other inverter circuits and modulation methods to develop for this family of converters such as multilevel sinusoidal pulse width modulation, multilevel selective harmonic elimination, and space-vector modulation. There are many applications for the inverter such as in laminators, conveyor belts, and unified power flow controllers. The need of active circuit at the front end of the input side for those inverters supplying regenerative loads is also discussed in the literature review or review, and the circuit design are also presented in the later chapter.

Finally, the methods to do the inverter and prototype of the circuit will be shown in chapter 3 and 4.

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Expected Outcome

Figure 1.0 shows an expected prototype or casing of the project:

Figure 1.0 - Expected prototype of the project.

1. ON/OFF switch

2. Place to put the circuit

3. Back support of the casing

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1.1 Disclosure of invention

1. The invention of multilevel inverter is using PIC16F877A microcontroller to drive the

motor driver.

2. The motor driver's output is then connected to power MOSFET to drive the induction

motor.

3. The operation is from DC to AC.

1.2 Patent Claims

1. The invention mainly on casing (1), (2) and (3).

2. The device of claim (1) is any square shape of ON/OFF switch.

3. The device of claim (2) includes all kinds of material.

4. The invention of claim (3) characterizes all kinds of material.

The technology of using PIC16F877A to control the multilevel inverter is invented by Malaysian and within the meaning of patent Act of Malaysia.

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1.3 Overview of the project

Figure 1.1 shows the block diagram on how the project works in general:

DC voltage

PIC microcontroller

Motor driver

MOSFET

inverter

AC voltage

Figure 1.1 - The block diagram of overview of the project.

From Figure 1.1, it is seen that the DC voltage is from the power supply of 12V battery. The voltage is first reduces to 5V to supply PIC. Part of it supply to the inverter but controlled by PIC microcontroller. The PIC used is 16F877A which generates a series of pulse then fed into the motor driver. When this goes to the output of motor driver, the MOSFET start to invert the pulse so as look like the AC voltage at the output.

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1.4 Objectives

The objectives of the project are:

 Producing the AC output voltage by inverting the 12V DC voltage.

 Producing a staircase AC waveform at the inverter output.

 The wave must be able to turn on the AC motor or control the AC motor.

From this report chapter 2 is the literature review. The chapter discuss the theory of current technology on multilevel inverter.

Chapter 3 is methodology. This chapter discuss on how the project planning. Flow chart is used to describe how the project will be completed on time. Actual circuit used and components used also will be mentioned in this chapter.

Chapter 4 is the presentation of experimental data. This chapter presents experiment on voltage and waveform measurement at the output of the circuit. Some technical explanation will be shown in this chapter.

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Chapter 5 is a discussion on prototyping chapter. This chapter displays the prototype of the project. Many photos will be shown in this chapter. Problem facings also discussed in this chapter.

Chapter 6 is a conclusion and future recommendation on the project. This chapter concludes experimental works, testing and assembly of the project. The chapter also mention advantages and disadvantages of the project. Future recommendations on the project improvement also fall into this chapter.

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Chapter 2: LITERATURE REVIEW

2.0 Multilevel inverter technology

In the 21 century, many heavy industries have commerce to demand higher power electrical equipment, which are now reach the Giga level. Many controlled ac drives in the megawatt range are now still available in the market with limitation on the number and they usually connected to the medium-voltage networking, which mean 1000V to 10kV perhaps. Today, it is difficult for engineer to connect a single power semiconductor switch directly to control the medium voltage grids such as (2.3, 3.3, 4.16, or 6.9 kV). Because of these reasons, a new family of multilevel inverters have invented as the solution for working in medium to higher voltage levels [1]-[3].

Multilevel inverters mean that they use an array of power semiconductors and capacitor as a voltage source and the output of which generate the voltages with stepped waveforms which look like staircase. The commutation currently designed in such a way that it allows switches adding more capacitor voltages, which can reach extreme high voltage at the output, while the task of the power semiconductors are only reduced the voltages. Figure 2.0 shown a schematic diagram on one of the particular phase lagging of inverters with different numbers of levels, for which the action of power semiconductors is represented by an ideal switch added with several positions [4].

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Figure 2.0 - Difference lagging of the inverters.

A two-level inverter as shown in (a) of Figure 2.0 can generates an output voltage with two voltage values (levels) which respect to the negative terminal of the capacitor. The three-level inverter however generates three voltages, and so on.

To see how the inverter work, let's consider that there is the number of steps of the phase voltage appears on the negative terminal of the inverter, so the number of steps in the voltage between the two phases of the load "a" is

a = 2n + 1 (1)

and if there is a number of steps b in the phase voltage of three-phase load in wye connection is given by:

b = 2n - 1 (2)

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The term of multilevel begin with three-level inverter which introduced and discovered by Nabae et al. [4]. According to the theory, by increasing the number of levels in the inverter, the output voltages becomes more steps and hence generating a staircase waveform, approaching sine wave which reduced the harmonic distortion. However, if the number of levels is increases, so the control circuit complexity and voltage imbalance problems will happen. This cannot eliminate at this high level.

There are three different circuits have been proposed in this modern multilevel inverter. They are: diode-clamped (neutral-clamped) [4], capacitor-clamped (flying capacitors) [1], [5], [6]; and cascaded multicell which separate dc sources [1], [7]-[9]. Other than that, several modulation techniques and control circuits have been built or developed for multilevel inverters and this include: multilevel sinusoidal pulse width modulation (PWM), multilevel selective harmonic elimination, and space-vector modulation (SVM).

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The characteristic of multilevel inverters are as follows:

 The inverter can produces output voltages with low noise or distortion.

 They draw high input current without distortion.

 They produces smaller common-mode (CM) voltage, thus reduces the stress in the

motor bearings. Also, by using the sophisticated modulation methods, CM voltages

can be eliminated [8].

 They can sustain in low switching frequency.

In many patents search, the results show that multilevel inverter circuits actually have been invented around for more than 25 years. The early patent on the inverter appeared in 1975 [9], in which then followed by cascade inverter which was first defined with the format that connects separately with the dc-sourced full-bridge rectifier circuit in series to synthesize the staircase ac output voltage. Through the manipulation of the cascaded inverter, we can see that the diodes block the sources and clamped output variation voltage [10]. Some people call the diode-clamped inverter as the neutral-point clamped (NPC) inverter at the time it was used in a three-level inverter with the mid-voltage level which was defined as the neutral point. Because the NPC inverter can effectively doubles the voltage level without requiring precise voltage matching, so the circuit is now prevailed in the early of 1980s. The application of the NPC inverter now is extensively and can be found in [11].

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Since the cascade inverter was invented, now its applications still not prevail in the industry until the mid of 1990s. Two important patents [12], [13] were found to indicate the useful of cascade inverters to drive the motor and use in utility applications. Because there is a great demand of medium to high-power inverters, the cascade inverter now becomes tremendous interesting even until today. Several patents also found for the applications of cascade inverters in the regenerative-type of motor drive [14]-[16]. U.S has invented many multilevel inverters. The registration for U.S. submit the multilevel inverter for patents, which were the capacitor-clamped multilevel inverters, came in the 1990s[17], [18]. Now, the multilevel inverters are used extensively in high-power applications under medium voltage levels. The applications include the use of laminators, mills, conveyors, pumps, fans, blowers, compressors, and etc.

2.1 Diode clamped inverter

The three level of diode inverter is shown in Figure 2.1. From Figure 2.1, the DC bus voltage is divided into three levels by two connected capacitors C1 and C2 in series connection. The centre point of two capacitors n is a neutral point. The output voltage therefore has two values: VDC/2 and -VDC/2. For the positive voltage level VDC/2, switches S1 and S2 are turn on. For -VDC/2, the switches S'1 and S'2 also need to be turned on and for the zero level, S2 and S1' are turned on as well.

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Figure 2.1 - Diode clamped multilevel inverter circuit.

To differentiate the three levels inverter circuit with the two level inverter, we can identify the diode D1 and D1'. These two diodes clamp on the switch voltage so that half the level of the DC voltage will appear at the output. Now, when both S1 and S2 are turn on, the voltage across a and 0 is a VDC. Under this condition, D1' balances out the voltage sharing between S1' and S2' with S1' block the voltage appear at C1, S2' and S2. Therefore, Van as shown is an AC voltage and Va0 is a DC voltage.

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As shown in Figure 2.1, the difference between Van and Va0 is the voltage drops across capacitor C2 that is VDC/2. If the output from the circuit is removed between 0 and a, the circuit will then becomes a DC/DC converter and now producing three output voltage levels that is: VDC, VDC/2 and 0.

A five levels diode clamp inverter also available in the market. Figure 2.2 shows this inverter:

Figure 2.2 - Five levels inverter circuit.

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As shown in Figure 2.2, there are 4 capacitors C1, C2, C3 and C4. For the DC output, there are VDC/4 voltage across each capacitor and each device stress will be limited to one capacitor voltage level which is VDC/4 through the clamping diodes.

The staircase voltage appears can best be explained if the reference point n is considered as the output phase reference voltage. As shown, there are five switches combined to synthesis the five voltage across a and n. These are explained as shown below:

 If the Van level is VDC/2, turn on the upper switches S1 to S4.

 If the voltage level Van is VDC/4, then turn on three upper switches S2 to S4 and one

lower switch S1'.

 If the voltage level of Van = 0, turn on the two upper switches S3 and S4 and the lower

switches S1' and S2'.

 If the voltage of Van is -VDC/4, the upper switch S4 and three lower switch S1' to S3'

will be turn on.

 If the voltage level of Van = -VDC/2, then the lower switches S1' and S4' will be turned

on.

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So, in summary, a pair of switch is turned on while the other pair is turned off. Although each active switching device is only required to block certain voltage level of VDC/(m-1), the clamping diodes must have difference voltage rating for reverse voltage block.

2.2 Capacitor clamp inverter

Figure 2.3 shows the basic circuit of phase-leg capacitor clamped inverter.

Figure 2.3 - Capacitor clamped multilevel inverter.

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Many people call this circuit as flying capacitor inverter [1], [5], [6]. Figure 2.3(a) shows the inverter provides three level output voltage across a and n. This makes the VDC half either positive or negative. Under this, switch S1, S2, S1' and S2' are turned on. Clamping capacitor C1 is then charged when S1 and S1' are turned on together. The capacitor is then discharge when S2 and S2' are turned on. To implement this capacitor clamping inverter, we have to make sure each capacitor use must have the same rating and value. If the capacitors have different reading, that means the inverted signal will be distorted.

2.3 Cascaded multicell inverters

In this inverter, 9 level inverters with four cells in each phase is designed. The resulting phase voltage is then combined by the addition of voltage generated by each cells. Each inverter will generate three output voltage: VDC, -VDC and 0. By combining these three voltage, we get AC voltage via the switches.

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Chapter 3: METHODOLOGY

Study the multilevel inverter circuits and learn the C program to do interfacing To have a successful project, a proper plan is designed to accomplish the project. The flow chart below shows the entire project plan:

Build a low cost circuits, test the circuit and run the program.

Is the circuit and program work?

Yes No

Build the prototype and hardware into PCB

Is the prototype working?

Troubleshoot the circuit Yes No

Write the project report

End

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Actual circuit used in the project

Multilevel inverter The entire project consists of PIC microcontroller, High and low side motor driver, MOSFET power inverter and Pulse width modulator. Figure 3.0 shows the summary of the circuit:

MOSFET inverter

Pulse width modulation

Control circuit

Figure 3.0 - Scope of the project.

Figure 3.1 shows the complete schematic diagram of the main control circuit. Note that the circuit consists of PIC16F877A and High/Low driver. The PIC16F877A microcontroller control the output send to the High/Low driver. It is then connected to power MOSFET inverter which shown in Figure 3.2.

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Figure 3.1 - The main control circuit.

Figure 3.2 - The inverter circuit.

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By looking into the schematic diagram in Figure 3.1, it is seen that the pin1 of PIC16F877A is connected to voltage regulator which supply 5V to the PIC. Pin2 of the microcontroller connected to R3 and R4 resistor which they form the voltage divider. Input to this pin is given by:

Pin12 and 31 are connected to ground and pin21, 22, 29, 30, 38, 39 and 40 are connected to High/Low side driver. The output of the drivers feature high pulse current once is activated at the input pin. Two capacitors shown at the output are used to hold the charging voltage and the diode is to protect the device.

Figure 3.2 shows the inverter circuit that consists of 6 power MOSFETs. Each pair will generate the staircase at the output which approximate like sinusoidal waveform. The programming to generate and control the operation of multilevel inverter is shown in next page.

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long voltage;

void main() {

ANSEL = 0x01; // set AN0 as analog input

ANSELH = 0;

TRISA = 0xFF ; // PORTA as inputs

TRISB = 0x00 ; // PORTB is output

TRISD = 0x00; // PORTD is output

PORTB = 0;

Delay_ms(1000);

PORTB = 0xFF;

Delay_ms(1000);

PORTB = 0;

Delay_ms(1000);

while (1) {

voltage = ADC_Read(0)*0.0048 *5.6; //read voltage from battery

//Output at Port B to indicate voltage level

if (voltage >= 8){

PORTB = 0x80;

}

else if ((voltage < 8) && (voltage >= 3)) {

PORTB = 0x40;

}

else {

PORTB = 0x20;

}

PORTD = 0xA8;

PORTD = 0x54;

}

}

ANSEL = 0x01; // set AN0 as analog input

ANSELH = 0;

TRISA = 0xFF ; // PORTA as inputs

TRISB = 0x00 ; // PORTB is output

TRISD = 0x00; // PORTD is output

Note that the few lines in the program are used to define the input and output port. This is shown below:

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Notice that analogue input is define as ANSEL = 0x01 and input port is TRISA = 0xFF and output port is TRISB and TRISD which initially set to 0x00. Initializing the port is very important before the actual program send and receive the command. The program is used to open the pin configuration or identify where the signal should goes after processing.

PORTB = 0;

Delay_ms(1000);

PORTB = 0xFF;

Delay_ms(1000);

PORTB = 0;

Delay_ms(1000);

Setting the delay to control signal is shown in the below coding:

The above command is important to make sure there is no overlap of the signal appears at the output.

while (1) {

voltage = ADC_Read(0)*0.0048 *5.6; //read voltage from battery

//Output at Port B to indicate voltage level

if (voltage >= 8){

PORTB = 0x80;

}

else if ((voltage < 8) && (voltage >= 3)) {

PORTB = 0x40;

}

else {

PORTB = 0x20;

}

PORTD = 0xA8;

PORTD = 0x54;

}

The next command shows generating a series of pulse at the output pins of the PIC16F877A.

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The general or overall circuit working in terms of signal flow is summarized as shown below:

Square wave with enhance amplitude

High/Low driver

Square wave

PIC16F877A

Approximate

Sine wave

Inverter

3.1 Main components used in the project

3.1.1 PIC16F877A

Figure 3.3 - PIC16F877A pin configuration.

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Figure 3.3 shows the pin configuration for PIC16F877A microcontroller. The feature of PIC16F877A is that it can operate frequency range from DC to 20MHz. There are 14 bit words program memory with 368 data memory and EPROM can support data up to 256. The input and output port is A, B, C, D and E. There are also 8 input channels of 10 bit analogue to digital module.

3.1.2 HIGH/LOW side driver

Figure 3.4 - High and low side driver.

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Figure 3.4 shows the driver. This driver is designed to boost the voltage up to 500 or 600V. The gate drive supply voltage is 10 to 20V. Not only that, the device also can handle 2A input and output current. The triggering is cycle by cycle and the output voltage is inphase with input voltage.

3.1.3 Power MOSFET

Figure 3.5 - 2SK2363 power MOSFET.

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Figure 3.5 shows the power MOSFET device that is used in the project. According to this component, the VGS can handle 10V with ID is 4A. The total power dissipation is 35W. The drain current pulse can goes up to 32A.

3.2 Express schematic software

To design the circuit diagram for this project, Express schematic software is used. Figure 3.6 shows the window of the software:

Figure 3.6 - The window of Express SCH.

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This software can be downloaded free from internet and it is free trial for 30 days. The software is easy to use. As shown in Figure 3.6, on left is the tool bar to draw the line connection and customize the components. The components library function also located in the tool bar.

User can zoom in and zoom out from the window. The components also can be selected from the components list. Figure 3.7 shows the example of component has been selected from the components list. The component list is shown in Figure 3.8.

Figure 3.7 - Typical component has been selected from the list.

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Figure 3.8 - Component list selection function.

3.3 Express PCB software

Figure 3.9 shows the express PCB software window:

Figure 3.9 - Express PCB window.

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The window shown in Figure 3.9 actually comes with the Express schematic software. This window is for PCB design at which the PCB track will printed on the copper board. The design of PCB can up to double layer if using this Express PCB. Typical example of PCB track for this project can be found in appendix.

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Chapter 4: RESULTS

4.0 Main control circuit construction

Figure 4.0 shows the main circuit construction:

Figure 4.0 - The construction of main control circuit.

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Figure 4.1 shows the testing of the input supply voltage to the voltage regulator:

Figure 4.1 - Testing on the supply voltage.

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As shown in Figure 4.1, the measured input to the voltage regulator is 9.07V in DC. Figure 4.2 shows the commend send out by the PIC16F877A.

Figure 4.2 - The commend voltage send out PIC16F877A.

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Figure 4.3 shows the high output voltage send by PIC16F877A:

Figure 4.3 - Output voltage send by PIC16F877A.

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4.1 Output waveform of the inverter

When measure the output of the inverter, it shows the waveform which looks like the one in Figure 4.4.

Figure 4.4 - Output waveform of the inverter.

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The staircase output is shown in Figure 4.5:

Figure 4.5 - Approximate staircase output waveform.

As seen in Figure 4.5, the waveform generated after the driver. This shows that the waveform is ready transformed into AC and it appears in Figure 4.4 which look like AC waveform. Typical voltage is 180V with 50Hz frequency. It is hard to capture the waveform.

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Chapter 5: DISCUSSION ON FINDING

5.0 Prototype discussion

As seen from chapter 4, the prototype design is simple and easy to operate. There is no casing is needed. If this is the case, the air blow can reduce the temperature of the component while it is in operation. The PCB material used is FR4 type of PCB.

5.1 Problem facing

From this project, there are few problems facing while design and constructing the multilevel inverter. The first problem is the impedance matching problem. This happens in the MOSFET transistor. The input impedance of the MOSFET transistor is very high. Therefore, selecting suitable components to match the MOSFET impedance is very important.

The second problem is the C program language. This takes long time to learn. But luckily it can be learned from online. The C program is used to program the PIC16F877A to generate a series of pulse so that staircase voltage of multilevel can appear at the output. This followed by inverter to convert this into approximate sine wave.

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Chapter 6: CONCLUSIONS AND RECOMMENDATIONS

From this conclusion it can be learned that building the multilevel inverter is not so easy. The difficult part is the accuracy inversion of the series of pulse into staircase waveform. To achieve such waveform, we need good timing control on the MOSFET's gate. Without good timing control, waveform will be lost. Also, it is discover that PIC timing is faster than the inversion timing. This is because the PIC used is 20MHz clock whereas the inversion is using 50Hz. Because of this problem, the output waveform is distorted.

Also, safety requirement is needed in the project. The PCB should not touch on any conducting surface because this will create a short circuit. When there is a short, the components might burn or people will get hurt.

For future improvement, it is recommend to higher level inverter so that more staircase can be formed. Also, the using battery charger circuit will keep the battery in good life, this is because it continuously charge the battery while the battery supply DC voltage to the inverter.

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