The Operational Amplifier System Overview Computer Science Essay

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The operational amplifier is undoubtedly one of the most useful devices in analog electronic circuitry. Op-amps are built with vastly different levels of complexity to be used to realize functions ranging from a simple dc bias generation to high speed amplifications or filtering. With only a handful of external components, it can perform a wide variety of analog signal processing tasks . Op-amps are among the most widely used electronic devices today, being used in a vast array of consumer, industrial, and scientific devices. Operational Amplifiers, or Op-amps as they are more commonly called, are one of the basic building blocks of Analog Electronic Circuits. Op-amps are used equally in both analog and digital circuits.

Op-amps which has nearly all the properties required for nearly ideal DC amplification and is used extensively in signal conditioning, filtering or to perform mathematical operations such as add, subtract, integration and differentiation is a linear device. An ideal Operational Amplifier is basically a 3-terminal device. It consists mainly of an Inverting input marked with a negative sign, ("-") and the other a Non-inverting input marked with a positive plus sign ("+"). Both these inputs are very high impedence The amplified output signal of an Operational Amplifier is the difference between the two signals being applied to the two inputs. In other words the output signal is a differential signal between the two inputs and the input stage of an Operational Amplifier is in fact a differential amplifier.

Our aim is to create the physical design and fabricate a low power Op-amp .An ideal op-amp having a single- ended out is characterized by a differential input, infinite voltage gain, infinite input resistance and zero output resistance. In a real op-amp however these characters cannot be generated but their performance has to be sufficiently good for the circuit behavior to closely approximate the characters of an ideal op-amp in most applications. With the introduction of each new generation of CMOS technologies design of op-amps continues to pose further challenges as the supply voltages and transistor channel lengths scale down.

1.2 SYSTEM OVERVIEW

For Op-amps used in many useful applications, rather a surprisingly large number of applications, the actual amplifier performance is closely approximated by an idealized amplifier model. Indeed quite frequently circuits are designed explicitly to insure acceptability of this approximation. And in other cases where the idealization is not a sufficiently accurate approximation nevertheless it often provides a starting point for an iterative process towards a final design. Consider the 741 amplifier, an older but proven industry-standard device, which has a voltage gain exceeding 105 in normal operation. To cause an output voltage change between representative saturation voltage limits of ±15 volts, i.e., a full thirty-volt output change, the input voltage change involved is less than 0.3millivolt. Such a small voltage difference often may be neglected, i.e., approximated as zero, when compared to other circuit voltages with which it is associated in a KVL loop equation.

This section briefly discusses the basic concept of op-amp. An amplifier with the general characteristics of very high voltage gain, very high input resistance, and very low output resistance generally is referred to as an op-amp. Most analog applications use an Op-Amp that has some amount of negative feedback. The Negative feedback is used to tell the Op-Amp how much to amplify a signal. And since op-amps are so extensively used to implement a feedback system, the required precision of the closed loop circuit determines the open loop gain of the system.

A basic op-amp consists of 4 main blocks

a. Current Mirror

b. Differential Amplifier

c. Level shift ,differential to single ended gain stage

d. Output buffer

The general structure of op-amp is as shown in figure 1 below:-

Figure 1: General structure of op-amp

The first block is input differential amplifier, which is designed so that it provides very high input impedance, a large CMRR and PSRR, a low offset voltage, low noise and high gain. The second stage performs Level shifting, added gain and differential to single ended converter. The third block is the output buffer. The output buffer may sometimes be omitted to form a high output resistance un-buffered op-amp often referred to as Operational transconductance amplifier or an OTA. Those which have the final output buffer stage have a low output resistance (Voltage operational amplifiers).

1.3 APPLICATIONS

Operational amplifiers are used in so many different ways that it is not possible to describe all of the applications. However we may look into the use of opa-amps for some simple yet widely used applications to form an idea of its mode of employment for various applications:

a. Summing Amplifier (Adder): The summing amplifier is a handy circuit enabling to add several signals together. The summing action of the circuit shown in Figure 2 is easy to understand. By keeping the negative terminal close to 0V (virtual ground). The op amp essentially nails one leg of R1, R2 and R3 to a 0V potential. This makes it easy to write the currents in these resistors.

I1 = V1 / R1; I2 = V2 / R2; I3 = V3 / R3 …………………………………………... (1)

According to Kirchoff‟s law, we get I = I1 + I2 + I3 and

V0 = - RF ( V1 / R1 + V2 / R2 + V3 / R3) ……………………………………... (2)

Figure 2: op-amp summing circuit

b. Differential Amplifier: The difference op-amp produces the algebraic difference between two input voltages, which is shown in Figure 3. When RF=Rin and RA=RB the output of the amplifier can be given as VO = (VA - VB). Thus the setup amplifies the difference of two voltages by a constant gain set by the used resistances.

Figure 3: op-amp difference circuit

Current mirrors made by using active devices are widely used in analog integrated circuits not only as biasing elements but also as load devices for the amplifier stages. The extensive use of current mirrors for biasing in analog circuits stems from the fact that it provides superior insensitivity of circuit performance to variations in power supple and temperature variations. More over for small bias current requirements often current mirrors are favored over resistors as they are more economical in terms of die area. The high incremental resistance of the current mirror results in high voltage gain at low power-supply voltages. These apart the current mirrors and current sources find other applications in analog design as well.

A current mirror is a circuit designed to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading. The current being 'copied' can be, and sometimes is, a varying signal current. Conceptually, an ideal current mirror is simply an ideal current amplifier. The current mirror is used to provide bias currents and active loads to circuits. There are three main specifications that characterize a current mirror. The first is the current level it produces. The second is its AC output resistance, which determines how much the output current varies with the voltage applied to the mirror. The third specification is the minimum voltage drop across the mirror necessary to make it work properly. This minimum voltage is dictated by the need to keep the output transistor of the mirror in active mode. The range of voltages where the mirror works is called the compliance range and the voltage marking the boundary between good and bad behavior is called the compliance voltage. There are also a number of secondary performance issues with mirrors, for example, temperature stability.

In case of an ideal current mirror the output current is a product of the input current and a desired voltage gain. A unity gain causes the input current to be reflected at

the output. Ideally the current mirror gain has to be independent of input current frequency and the output current has to be independent of the voltage at the output node. In practice though real current mirrors suffer from many deviations from the ideal behavior. For instance neither is the gain independent of the input frequency nor does the current mirror output current stays independent of voltage variations at the output node.

2.2 CURRENT MIRROR

The basic current mirror implemented using MOSFET transistors is as shown in Figure 4. Transistor M1 is operating in the saturation or active mode, and so is M2. In this setup, the output current IOUT is directly related to IREF,

Figure 4: Basic Current Mirror

The drain current of a MOSFET ID is a function of both the gate-source voltage and the drain-to-gate voltage of the MOSFET given by ID = f (VGS, VDG), a relationship derived from the functionality of the MOSFET device. The drain-to-source voltage can be expressed as: VDS=VDG +VGS.

With this substitution, it provides an approximate form for function f (VGS, VDG):

…………….… (3)

Where Kp is a technology related constant associated with the transistor, W/L is the width to length ratio of the transistor, VGS is the gate-source voltage, Vth is the threshold voltage, λ is the channel length modulation constant, and VDS is the drain source voltage.

Now for the transistor M1 of the mirror circuit in figure 4, ID = IREF. Again the reference current IREF is a known current, and can be provided by a resistor as shown, or by a "threshold-referenced" or "self-biased" current source to ensure that it is constant and independent of voltage supply variations.

Using VDG=0 for transistor M1, the drain current in M1 is ID = f (VGS, VDG=0), so find f (VGS, 0) = IREF, implicitly determining the value of VGS. Thus IREF sets the value of VGS.

The circuit in the diagram forces the same VGS to apply to transistor M2. If M2 also is biased with zero VDG and provided transistors M1 and M2 have good matching (are exactly same as) of their properties, such as channel length, width, threshold voltage etc., the relationship IOUT = f (VGS, VDG = 0) applies to transistor M2 too, thus setting IOUT = IREF; that is, the output current is the same as the reference current when VDG=0 for the output transistor, and both transistors are

match.

2.3 Output resistance

Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the ro of the output transistor, namely (see channel length modulation):

………………………………………………… (4)

Where λ = channel-length modulation parameter and VDS = drain-to-source bias.

2.4 Compliance voltage

To keep the output transistor resistance high, VDG should be greater than zero Volts. That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is VOUT = VCV = VGS for the output transistor at the output current level with VDG = 0 V, or using the

inverse of the f-function, f −1:

……….... (5)

A current mirror is a circuit designed to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading. The current being 'copied' can be, and sometimes is, a varying signal current. Conceptually, an ideal current mirror is simply an ideal current amplifier. The current mirror is used to provide bias currents and active loads to circuits. M1 has the drain and gate terminals connected together. This forces M1 to operate in the saturation mode in this particular circuit if ID ≠ 0. In this mode

ID1 = Kn1' (VGS - Vt1)2 ……………………………………….….. (6)

With a zero gate current, IREF = ID1

Figure 5: NMOS Current mirror

Where we can see easily from the below circuit [Figure 6] that

IREF = (VDD - VGS - (-VSS))/RREF …………………………….. (7)

Now we will assume that the two MOSFETS in the circuit have the same VGS .since they are shorted at their gates and their sources are both connected to the VSS or ground terminal(VDD in case of PMOS transistors of Figure 7 ) Consequently the drain current in the second transistor is

ID1 = Kn2' (VGS - Vt2)2 …………………………………..…..,….…. (8) If these two transistors are perfectly matched but they are perhaps fabricated with different channel dimensions, then Kn1' = Kn2' and Vt1 = Vt2 so that by comparing the above equations we obtain

ID2 = ((W2/L2) / (W1/L1)) ID1 = ((W2/L2) / (W1/L1)) IREF ……….….……. (9)

The MOSFET current mirror using resistor RREF is shown in Figure 6 for NMOS.

Figure 6: MOSFET current mirror using resistor RREF

In this NMOS current mirror shown above, M2 acts as a current sink since it pulls current I0 = ID2 from the load, which in our case will be the amplifier circuits of the op-amp.

By using PMOS, this current mirror circuit [Figure 7] is constructed as

Figure 7: PMOS Current Mirror

Here Q2 acts as a current source since it pushes current I0 = ID2 into the load.

2.5 Practical Approximations

For small-signal analysis the current mirror can be approximated by its equivalent Norton impedance . In large-signal hand analysis, a current mirror usually is approximated simply by an ideal current source. However, an ideal current source is unrealistic in several respects:

 It has infinite AC impedance, while a practical mirror has finite impedance.

 It provides the same current regardless of voltage, that is, there are no compliance range requirements. Also even past the compliance range the current mirror output varies with the variation in voltage at the output terminal. The Norton equivalent circuit of a current mirror output consists of a resistance R0 in parallel with the current source dependent on the input current. This resistance R0 for the variation in current due to variation in voltage across output terminals and also affects directly the performance of many circuits that use a current mirror. Though it is not possible to build a real current mirror with infinite R0 the goal is to make it very large.

 It has no frequency limitations, while a real mirror has limitations due to the parasitic capacitances of the transistors.

• The ideal source has no sensitivity to real-world effects like noise, power-supply voltage variations and component tolerances. But in real life the gain of the current mirror varies. Variations may be systematic or random: systematic error accounts for the error occurs even when all components are perfectly matched and has to be calculated for each current mirror. While random error is the error caused by unintended mismatch between matched

elements.

The current mirror schematic is as shown in Figure 8 below:-

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The current mirror symbolic representations are as shown in Figures 9 and 10 below:-

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Figure 9: Current-Mirror Symbol Figure ] 0: Full Current -Mirror Schematic

The transient response of the current mirror is as shown [Figure 11] below:-

Figure 11: Current-Mirror Simulation

From the above characteristics it is observed that the current mirror got the values in nano- amperes, which is required while doing the calculations to meet the required specifications of the operational amplifier.

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