Rf Microwave Circuit Design Computer Science Essay

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Low Noise Amplifiers are solitary of the electronic amplifiers which are utilizing to enlarge feeble or extremely feeble signals which are confining by antennas. These amplifiers are the most important element utilize in the radio recipient circuit. It decreases the haphazardness from dissimilar period of in receipt of signal. LNAs are premeditated to comprise especially lavishly gains and especially depleted haphazardness stimulant. This is completed to decrease the overall haphazardness produced at the further succeeding levels of the amplifier. LNA is worn in diverse discipline of wireless communications which comprises cellular communication and wireless LAN's. An archetypal recipient for a radio frequency indication encompasses an amalgamation of an amplifier and a mixer for indication enlargement and it is still employed for frequency exchange. A decisive structure obstruct in a radio receiver is the modest noise amplifier.

The LNA amplifies the established indication and make better its influence higher than the noise intensity created by consequent circuits. An LNA offers a stable gain above a precise frequency bandwidth. An individual total purpose is utilization of a LNA as the key in period of a receiving circuit, such as in a mobile communications. In a radio frequency indication receiving equipment such as a cell phone and a foot location of a wireless communication arrangement, received signals has extremely feeble strength and consist of substantial noise mixed in it. As such, the executions of the LNA seriously impinge on the sensitivity of the radio receiver. The low noise amplifiers is capable of reducing most of the arriving noise and magnify a preferred signal to a definite frequency assortment to augment the signal to noise ratio (SNR) of the communications and progress the excellence of established signal as well. Reckoning scheduled signal frequency, an LNA be able to put into operation as an unlock loop or locked-loop amplifier and possibly will also encompass a prerequisite to counterpart unambiguous resource impedance.

LNA DESIGN PATTERN

The intention of this experiment is to create a Low Noise Amplifier (LNA) by means of conventional technique (calculation and smith chart) and also with the Advance Design System software. The experiment is to end up with a design, which consist layout of the circuit and component values.

Low Noise Amplifier Specification:

Utilize Philips BFG 198 transistor.

Centre frequency 900MHz, bandwidth 100MHz

Gain: 12dB 0.5dB.

Noise Figure: < 1.4 dB.

I/P & O/P return loss: < -10dB.

The most important features for LNA are:

Gain

Input and Output impedance matching

Reverse isolation

Power Consumption and Supply Voltage

Noise

Linearity

Stability

CHAPTER 2: AMPLIFIER CIRCUIT TOPOLOGY

2.1) BI-POLAR JUNCTION TRANSISTOR:

The BJT is a 3 terminal semiconductor device assembled on doped semiconductor substance. Emitter, collector and base are the three terminals of the BJT. It has been divided under 3 type of configuration. They are common emitter, common base and common collector. Because of the minority and majority carriers BJTs are called bipolar. BJT's are also being the p type (PNP) or the n type (NPN). Bipolar Junction Transistor encompasses two types of biasing; it is reverse biasing and forward biasing. The NPN symbol is shown below.

http://upload.wikimedia.org/wikipedia/commons/thumb/a/aa/BJT_symbol_NPN.svg/510px-BJT_symbol_NPN.svg.png

Figure 1: NPN type BJT

From the figure above, the B symbolizes the Base terminal, the C symbolizes the collector terminal, and the E symbolizes the emitter terminal. The base is actually positioned flanked by the emitter and the collector and it is frivolously doped. In BJTs the current is supplied at the input (base) and back generates larger current at the output (collector). is denoted as the gain of BJT transistor. The BJTs enclose to be biased suitably for a dependable and successful amplification. BFG198 transistor has been used in this experiment.

Figure 2: Amplifier Block Diagram

From the data sheet of the Philips BFG198 transistor, the following parameters were obtained;

S11 = 0.61  178 NFmin = 1.5dB

S21 = 3.0  78 opt = 0.48  134

S12 = 0.09  37 rn = 0.15 (normalized)

S22 = 0.28  -69 NFi = 2.0dB

The finest gain is achieved by matching to the input, and with the output. However, since we comprise the given specifications for the LNA, the most excellent noise figure will be selected by corresponding the input with the value of and the output with. The input will be coordinated with and the output will be coordinated with

In the reflection coefficient, this is the proportion of amplitude of the returned gesticulate to the amplitude of the happening gesticulate. When ΓS = S11 and ΓS = S22, it is an ideal equivalent.

Figure 3: Block diagram of Reflection co-efficient

CHAPTER 3: CALCULATIONS AND SMITH CHART

The calculations for the smith chart are shown below:

3.1) NOISE CIRCLE CALCULATION:

Step1: Calculation of noise figure parameter

Step2: Calculation of centre of noise circle

Step3: Calculation of radius of noise circle

Now we can draw Noise Circle on Smith chart.

3.2) GAIN CIRCLE 12dB CALCULATION:

Step1: Calculation of intermediate quantity

Step2: Calculation of intermediate quantity

Step3: Calculation of intermediate quantity

Step4: Calculation of intermediate quantity

Step5: Calculation of Stability Factor

Step6: Calculation of centre of Gain Circle

Step7: Calculation of radius of Gain Circle

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C:\Users\pavankrishnaer\Desktop\RF IMAGES\smith chart.jpgCHAPTER 4: EXPLANATION OF MATCHING AND BIASING

NETWORKS

4.1) AMPLIFIER BIASING:

In support of Bipolar Junction Transistors, there are generally two category of biasing. Those are forward and reverse biasing. In this particular experiment Collector feedback biasing has been utilized. With this kind of biasing between base and collector a resistor is connected as showed in the below diagram.

Figure 4: Self-Biasing

The particular electrical circuit guarantees to facilitate the feedback voltage from the collector is passing in the course of base in arrange to widen forward biasing. This is described as collector feedback bias. This biasing procedure is frequently employed to bias linear amplifiers. The major benefit of this biasing is that it is an uncomplicated circuit by way of compellingly steady Q-point. This biasing technique is a smaller amount reliant on temperature and current gain equate to fix biasing. in favor of this meticulous category of biasing the current gain (β) increases, collector current (Ic) increases.

4.2) FIXED BIASING:

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Figure 5: Fixed Bias

This biasing scheme essentially comprises of a resistor (RB) linked within the collector supply-voltage and the base. Inopportunely, this arrangement is effortlessly undermined by temperature alterations. Whenever the temperature of the transistor increases, as a consequence of an augment in ambient temperature or else current flow through it, collector current will enhance. These heighten in current furthermore grounds the Q-point, to reallocate away from its preferred location.

4.3) VOLTAGE DIVIDER BIAS:

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Figure 6: Voltage Divider Bias

This is a extremely unwavering bias circuit. The currents and voltages are approximately self-governing of discrepancy inb. This voltage divider bias is a amalgamation of fixed bias and self bias. Fixed bias is afforded by the voltage divider system of R1 and R2 and Self bias is afforded by the emitter resistor, RE. When the temperature enhances, IC and IE intensifies. This will in turn lead to a decline in the collector voltage VC. Negative feedback is provided by RE. Amalgamation biasing technique furthermore endow with steadiness to transistors. The R1 and R2 remain the base bias unvarying whilst RE remains the output even.

Precise analysis:

The load line end points can be calculated by:

4.4) COLLECTOR FEEDBACK -SELF BIASING:

Figure 7: Self -biasing

In the self biasing scheme, resistor is positioned flanked by the base and collector, as publicized below. This guarantees that a feedback voltage is supplied from the collector to the base to widen forward bias. This is known to as self-bias. The collector voltage (VC) will in turn descend, as of the augment of voltage fashioned across the load resistor (RL).

Self bias is considered as the best biasing method for this LNA design because,

Self bias is steadier to several temperatures than the permanent bias.

Temperature altering will not take place in self bias seeing as it is auxiliary firm.

Self biasing in addition necessitates less significant mechanism to put into practice than voltage divider bias.

Figure 8: Final circuit diagram for LNA design

CHAPTER 5: DEMOSTRATION AND USAGE OF SOFTWARE

5.1) INTRODUCTION TO ADS SOFTWARE:

Advanced Design System (ADS), is authoritative electronic design automation (EDA) software for RF, microwave, and high-speed digital design and verification. It is known for its incorporated deposit of speedy, precise and comprehensible arrangement; circuit & EM simulators that facilitate first-pass design accomplishment; time-saving apparatus similar to filter design and application-specific design Guides that summarize years of proficiency in an easy-to-use interface. It furthermore move toward collection through Agilent Instruments with the most basic virtual-physical archetype.

5.1.1) S-PARAMETERS:

S-Parameters are recognized as distribution parameters. In these parameters the Voltages and currents are complicated to determine in microwave composition as they are scattered values and fluctuate through their situation in microwave structures. It is impractical to determine extensively broaden current in a waveguide. The performance of a two port system is in requisites of occurrence and replicated waves. This scheme is known as distribution parameters. This is extremely supportive to evade several voltage and current troubles predominantly in the magnitude of a transistor.

Figure 9: S-Parameters

The equation for S-parameters are given as

Where,

S11 = Input Reflection Coefficient

S12 = Reverse Transmission Coefficient

S21 = Forward Transmission Coefficient

S22 = Output Reflection Coefficient

5.1.2) MAXIMUM GAIN:

Maximum gain is the utmost achievable gain that is able to be accomplishing by a transistor beneath convinced circumstances. Supposedly, maximum power gain can be accomplished barely when the mechanism is conjugated coordinated to its resource and load impedance. This consequence in untainted resistance set-up as the conjugates will abandon a number of reactance. Maximum gain is basically inaccessible but a confrontation can be prepared among several of the parameter standards. LNA is better as higher the maximum gain.

5.1.3) VOLTAGE STANDING WAVES RATIO:

Voltage Standing Wave Ratio (VSWR) is an enumeration of divergence among the source impedance and input impedance. While an indication accomplishes the port of the apparatus, various parts of the signals are returned backside to the source. The replicated signal and the signal on or after the source then formulate a standing wave. This represent a minor VSWR demonstrate an enhanced coordinated arrangement whilst superior VSWR designate a brutal inequality. Hefty VSWR be able to affect transmitter dent in lofty control transmitters.

5.1.4) MINIMUM NOISE FIGURE:

Noise Figure is utilized to evaluate noise in a set of connections to the noise in an idyllic hushed milieu. Noise figure cadences the dilapidation of signal at the same time as it surpass as of input to output. Confident amplifiers enclose extra innate electrical noise than formers. Fabricators habitually bring into being a consignment of transistors, then categorize and cite the transistors granting to their inbuilt electrical noise echelons. This is accomplishing by ascertaining the ratio SNR (signal to noise ratio) next to the key in of the indication to noise proportion at the amount produced. Scientifically,

Noise Figure = 10logF

F = {Input SNR / Output SNR} at 290K

5.2) LNA DESIGN USING ADS:

Step 1: Selecting the transistor:

The first step is to select the transistor. In order to this a new project is created and the new schematic window is opened. The specified requirement advises using Philips BFG198 transistor. To decide on the transistor, choose 'library' from the menu toolbar. Click the pinnacle of the file tree ALL. Then select tools from the menu bar and select find in the library window. Transistor name is typed in the lately unwrap dialogue box. From the list, BFG198 with Vcc = 4V and Ic = 10mA are selected.

Figure 10: Selecting the transistor

Step 2: Designing the circuit:

'Tlines-Microstrip' palette is selected first, 'Msub' button is clicked and placed it in the representation window.

'Msub' is selected to association the parameters for the microstrip lines.

'Msub' is double clicked and the values of parameters are entered in dialogue box revealed. The values are: H = 1.58, Er = 2.55, T = 0.03 and tanD = 0.01.

Figure 11: Circuit designing

Step 3: Frequency dependent components:

The MLINs and MTEEs are applied to bond two or three machinery in that order. These apparatus are pertained to as frequency reliant apparatus.

MLINs and MTEEs are selected from the micro strip palette.

The MLINs and MTEEs positioned to 3mm x 3mm with the exception those concerning to the ports, the other MLINs and MTEEs were position to 4.4mm x 5mm.

This movement composes the simulation be as pragmatic as achievable.

Step 4: Biasing Network:

A bias network formulates the simulation further pragmatic when it is linked in the circuit. The bias circuit is prepared of 2 resistors and 2 low pass amplifiers. The base and collector of the transistor all encompass a low pass amplifier. This put together the impedance path to be squat on the ground. The amplifier constituent values are competent of be premeditated from a smith chart; seeing as using the ADS software resolve be via the optimizer to obtain the standards too.

Step 5: Optimizing the LNA design:

Subsequent to manipulative the circuit the design is optimized. This is able to be completed by double clicking on all the components. All components in the similar circuit and the DC jamming capacitors were elected to be 'discrete optimized'.

Figure 12: Requirements for LNA design

The constraints are being positioned and it desires to be modernized whilst simulating the design. Results are checked from the graph subsequent to each simulation in anticipation of the definite goals have been accomplish. It is precise that the domino effect be obliged to be position to: S (2, 1) for significance among 11.5dB and 12.5dB, and NFmin (minimum Noise Figure) for significance less than 1.4 dB.

5.3) CONVERTING LNA DESIGN TO MICROSTRIP LAYOUT:

5.3.1) Selecting a transistor with a package:

On one occasion the simulation progression is completed the subsequently footstep is to renovate the design to microstrip outline. The subsequently pace in the microstrip outline is to reinstate the transistor with an added transistor that comprise a parcel allied among it. Subsequent to restore the transistor, an superfluous ground connection from the following emitter of the transistor desires to be added. The package, BFG198, is taken from the library. The stature under equates the two packages.G:\RF 12.JPG

Figure 13: 3-Terminal and 4-Terminal Packages

5.3.2) Creating a layout:

To generate a design, choose position components from scheme to layout, from the layout menu. This opens the layout window. Small red boxes will emerge to be adjacent the apparatus in the representation. The layout topology is made from left to right. It is achievable of components. Placed auto placed. Components are located as of left to right through port1 embodying the primary.

CHAPTER 6: RESULTS

After several simulation processes the results are investigated whether it has met the prerequisite or not.

6.1) LNA DESIGN:

G:\RF 4.JPG

Figure 14: LNA Design

6.2: OPTIMIZATION WAVEFORM 1:

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6.2.1) DATA FOR WAVEFORM 1:

Data derived from the result of waveform 1

PROPERTY

REPRESENTATION

REQUIRED VALUE

ORIGINAL VALUE(dB)

Input Reflection Coefficient

S(1,1)

10dB

-16.2

Reverse Transmission Coefficient

S(1,2)

-10dB

-17.59

Forward Transmission Coefficient

S(2,1)

10dB

10.20

Output Reflection Coefficient

S(2,2)

-10dB

-6.16

Voltage Signal Wave Ratio

VSWR

2dB

1.40

Maximum Gain

MaxGain

12dB +/- 0.5dB

11.69

Minimum Noise Figure

NFmin

1.4dB

1.651

Table 2: Data and Requirements for waveform 1

6.2.2) DISCUSSION:

The LNA design does not meet the requirement since the input reflection coefficient is higher than the requirement. So again the design is optimize.

6.3) OPTIMIZATION WAVEFORM 2:

C:\Users\pavankrishnaer\Desktop\RF IMAGES\RF 10.jpg

6.3.1) DATA FOR WAVEFROM 2:

Data derived from the result of waveform 2

PROPERTY

REPRESENTATION

REQUIRED VALUE

ORIGINAL VALUE(dB)

Input Reflection Coefficient

S(1,1)

10dB

-11.29

Reverse Transmission Coefficient

S(1,2)

-10dB

-17.49

Forward Transmission Coefficient

S(2,1)

10dB

10.28

Output Reflection Coefficient

S(2,2)

-10dB

-9.21

Voltage Signal Wave Ratio

VSWR

2dB

1.73

Maximum Gain

MaxGain

12dB +/- 0.5dB

11.96

Minimum Noise Figure

NFmin

1.4dB

1.648

Table 2: Data and Requirements for waveform 2

6.3.2) DISCUSSION:

The necessary outcome is not accomplished as of this LNA design too, since the input reflection coefficient and reverse transmission coefficient is upper and does not meet the requirements. The output reflection coefficient is even higher too. So in order to get the desired result we need to optimize again.

6.4) OPTIMIZATION WAVEFORM 3:C:\Users\pavankrishnaer\Desktop\RF IMAGES\RF 3.jpg

6.4.2) DATA FOR WAVEFORM 3:

Data derived from the result of waveform 3

PROPERTY

REPRESENTATION

REQUIRED VALUE

ORIGINAL VALUE(dB)

Input Reflection Coefficient

S(1,1)

-10dB

-4.6

Reverse Transmission Coefficient

S(1,2)

-10dB

-8.9

Forward Transmission Coefficient

S(2,1)

10dB

10.17

Output Reflection Coefficient

S(2,2)

-10dB

-7.49

Voltage Signal Wave Ratio

VSWR

2dB

1.84

Maximum Gain

MaxGain

12dB +/- 0.5dB

12.30

Minimum Noise Figure

NFmin

1.4dB

1.510

Table 2: Data and Requirements for waveform3

6.4.3) DISCUSSION:

As a final point the necessary outcome has been attained later than three times of optimization, the assets have met the necessities.

6.5) LAYOUT DIAGRAM:

G:\RF 9.JPG

Figure 15: Layout

CHAPTER 7: CONCLUSION

The LNA design was thriving in the finish. The initial object that confers be there concerning the biasing of a transistor. Subsequent to scrutinizing the accessible technique of biasing, collector feedback (self) bias was preferred for the relevance with validation. In the subsequently phase we designed it by means of ADS software. The software was convenient for the simulation. The LNA was designed using BFG 198 transistor that operates at 1.85GHz. We have to meet certain specification such as S (1, 1); S (2, 2); should be less than -10dB but S (2, 1) is greater than 10dB. Also VSWR is less than 2dB and Noise figure is less than 1.4dB. The micro strip outline was to end with design totaling each and every one the compulsory and mandatory apparatus for PCB design. The necessities were once more congregate following 3 optimizations. The waveform by the optimization was converse on the subject of with the obligatory value and a few of the vital deliberations are finished in that constituent. The favored conclusion was simulated which bestow assortment of acquaintance regarding the LNA. The outline of the LNA design was in addition shown in this experiment. To end with this LNA design using ADS software provided an adequate amount of understanding regarding the LNA and be capable of improving skillfulness from first to last with this design.

CHAPTER 8: REFERENCE

BJT notes available at:

http://semiconductors.globalspec.com

Types of Bias. Integrated Publishing [online] available at

http://www.tpub.com/neets/book7/25d.htm

Eng 3036l lab manual

Rf & micro wave circuit design - library

(rf design, chris bowick, 1977)

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