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Using these specifications blocks or modules is prepared. These blocks are then used to make designs. These designs are then checked for bugs and debugging is carried out. The
Debugging procedure takes the most time in full product designing cycle. The debugging team of engineers is the biggest of all in the product designing and manufacturing cycle.
Physical designing is then carried out, which is followed by the chip fabrication and chip debugging. Now, during the fabrication of the chip there can be many errors. Nowadays, as the technology has advanced, the process of designing of fabrication of chip is carried out using computer systems and then the chip is fabricated.
There can be many errors which are found out during the chip characterization. In the characterization it is checked if the silicon wafer is fabricated properly. The chip is checked if there are any defects in it. Many times when the chip is fabricated, no defect is recognized, but there might be defect in the chip. Hence, to check for the correctness of IC characterization is important.
Now-a-days, I C Characterization is done by the use of computer software. There various number of software that is used to characterize an I C. The most commonly used techniques for characterizing an I C are as follows:
Automated Test Equipment (ATE).
Automated Test Equipment is computer controlled equipment that is used to test electronic devices for its proper functionality and performance. This equipment also conducts stress testing and with very less human interaction. ATE has the control hardware, sensors, and software that are used to collect and analyze the test results.
ATE performs tests on a device known as theÂ device under test that usesÂ automationÂ to perform the tests and / or to evaluate the test results. The ATE device can be as simple as aÂ digital multimeterÂ in which, its operating mode and measurements are controlled and analyzed by a computer, or it can as complex as a system that contains dozens of complex test instruments that are capable of automatically testing and diagnosing faults electronic systems, such as very sophisticatedÂ flying-probe testers.
Semiconductor ATE is named for testingÂ semiconductor devices which, tests a wide range of electronic devices and systems, from resistors,Â capacitors, and inductors toÂ integrated circuitsÂ (ICs),Â printed circuit boardsÂ (PCBs), and complex, completely-assembled electronic systems. 
A Semiconductor ATE consists of several instruments; among them are Digital Power Supply (DPS), Parametric Measurement Unit (PMU), Arbitrary Waveform Generators (AWG), Digitizer, Digital IO, utility supply. 
In Semiconductor ATE architecture, there is a master controller which synchronizes several other instruments. After the semiconductor devices have been fabricated, they have to be tested, so that even if there are small number of defective devices, manufacturers will suffer a high loss.
ATE systems are mainly interfaced with an automated placement tool, called a "handler" that places the device under test so that it can be measured by the equipment. Interface Test Adapter (ITA) is a device that makes electronic connections between the ATE and the Unit Under Test (UUT) and it may also contain additional circuitry to adapt signals between the ATE and the UUT and has physical facilities to mount the UUT .
Automatic test equipment diagnostics is the part of an ATE test that determines the faulty components. There are two basic functions that an ATE performs. The first function is to test if the unit under test is working correctly. The second function is to diagnose the reason when the unit under test is not working correctly. ATE is most widely used for characterizing and testing of devices in semiconductor industry.
What is ESD:
As per the knowledge of many people, static electricity is the shock experienced when we touch a metal doorknob when we walk across a carpeted room or when we slide across a car seat. Static electricity has always been a very serious problem for industries since centuries.
As and how the age of electronics increased it brought new problems in static electricity and ESD. The sensitivity of electronic devices towards ESD went on increasing as the devices became more and more fast and smaller. Nowadays, ESD impacts the productivity and product reliability in almost each and every aspect of today's electronics environment.
The production yield and manufacturing along with the costs, product quality and reliability is affected by ESD. "Industry experts have estimated average product losses due to static to range from 8-33%". 
"Electrostatic discharge is defined as the transfer of charge between bodies at different electrical potentials".  The electrical characteristics of a semiconductor device can be changed due to the Electrostatic discharge further degrading or destroying it. Also the normal operation of an electronic system will be upset due to the ESD causing equipment malfunction or failure. It also can damage devices which cause the device to fail immediately or it can cause the device to fail at the later time and not causing immediate failure. Electrostatic discharge can also occur during the manufacturing or testing or maybe during the shipping or operational processes. Different devices have different sensitivity to ESD .
Basic ESD Events that cause the device to fail
There are three different events that contribute to the failure of devices. The three events are direct electrostatic discharge to the device, electrostatic discharge from the device or field-induced discharges . The device's ability to dissipate the energy of the discharge is used to determine the damage that is caused to the ESDS device due to an ESD event. This is known as the device's "ESD sensitivity" 
1. Discharge to the Device
When any charged conductor even the human body discharges an electrostatic discharge sensitive device an ESD event is said to be occurred. The direct transfer of electrostatic charge from the human body or a charged material to the ESDS device is the most common cause of ESD damage. We consider an example, when one walks across a floor; an electrostatic charge accumulates on the body. Simple contact of a finger to the leads of an ESDS device or assembly allows the body to discharge, possibly causing device damage. The model used to simulate this event is the Human Body Model (HBM). A similar discharge can occur from a charged conductive object. The model used to characterize this event is known as the Machine Model (MM) .
2. Discharge from the Device
The transfer of charge from an ESDS device is also an ESD event. The Static charge is sometimes accumulated on the ESDS device itself during handling or contact with packaging materials, work surfaces, or machine surfaces. This occurs especially when a device moves across a surface or vibrates in a package. The model that is used to simulate the transfer of charge from an ESDS device is referred to as the Charged Device Model (CDM) . There are few cases where a Charged Device Model was more destructive than the Human Body Model for some devices. The trend towards automated assembly would seem to solve the problems of HBM ESD events. However, it has been shown that components may be more sensitive to damage when assembled by automated equipment . A device may become charged, for example, from sliding down the feeder. If it then contacts the insertion head or another conductive surface, a rapid discharge occurs from the device to the metal object causing the ESD event .
3. Field Induced Discharges
The third event that directly or indirectly damage devices is known as Field Induction. A charge may be induced on the device if an ESDS device is placed in the electrostatic field. The transfer of charge from the device will occurs as a Charged Device Model event if the device is grounded for a while within that electrostatic field. If the device grounded again and then removed from the region of the electrostatic field, second Charged Device Model event will occur because of the transfer of charge of opposite polarity from the first event.
Device Sensitivity and Testing
There are few test procedures that are used to characterize, determine, and classify the sensitivity of components to ESD. These test procedures are Human Body Model (HBM), Machine Model (MM), and Charged Device Model (CDM). These models have proved to be successful over 95% of all ESD field failure . These test procedures, can be helpful for the industries to develop and measure suitable on-chip protection, enable comparisons to be made between devices and provide a system of ESD sensitivity classification to assist in the ESD design and monitoring requirements of the manufacturing and assembly environments .
Human Body Model
The Human Body Model is the oldest and most commonly used model for classifying device sensitivity to ESD. This testing model represents the discharge from the fingertip of a standing individual delivered to the device. It is modeled by a 100 pF capacitor discharged through a switching component and a 1.5kÎ© series resistor into the component.
Figure 1: Typical Human Body Model Circuit 
HBM sensitivity is usually tested using automated test systems. The device is placed in the test system and contacted through a relay matrix. ESD zaps are then applied and then the post stress I V current characteristics are reviewed to check if the devices fail. The number of zaps per stress level and polarity has been reduced from 3 to 1. Also, the minimum time interval between zaps has been reduced from 1 second to 300 milliseconds .
A discharge can also occur from a charged conductive object like a metallic tool. Originating in Japan as the result of trying to create a worst-case HBM event, the model is known as the Machine Model. This ESD model consists of a 200 pF capacitor discharged directly into a component with no series resistor .
This model represents many real-world situations like the rapid discharge from a charged board assembly or from the charged cables of an automatic tester.
Testing of devices for Machine Model sensitivity is similar to Human Body Model testing. The test equipment for the human body model and the machine model is the same but the only difference is that the test head is slightly different. The Machine Model does not have the 1.5K ohm resistor as the human body model had, but the test board and the socket are the same as it is for human body model testing. The inductance that is connected in series is the dominating parasitic element that shapes the oscillating machine model wave form .
Figure 2: Typical Machine Model Circuit 
Charged Device Model Testing
We have already seen how the Charged Device Model (CDM) event occurs. This model is more destructive than the human body model and the machine model for some devices. The duration of the discharge is very short mostly it is less than one nanosecond and the peak current can reach several tens of amperes.
Several test methods have been explored to duplicate the real-world CDM event and provide a suitable test method that duplicates the types of failure that have been observed in CDM caused field failures . Current work in the area is concentrating on two separate CDM test methods. One is termed CDM and best replicates the real world charged device event. The other addresses devices that are inserted in a socket and then charged and discharged in the socket. It is termed the socketed discharge model (SDM) .
Figure 3: Typical Charged Device Model Test 
In this test the device is placed on a field plate with its leads pointing up and then charging and discharging the device. The device is placed in a socket which is charged from a high-voltage source and then discharged.
250 volts to <500 volts
500 volts to < 1,000 volts
1000 volts to < 2,000 volts
2000 volts to < 4,000 volts
4000 volts to < 8000 volts
>= 8000 volts
Table 1 ESDS Component Sensitivity Classification - Human Body Model (Per ESD STM5.1-1998) 
100 volts to <200 volts
200 volts to <400 volts
> or = 400 volts
Table 2 ESDS Component Sensitivity Classification - Machine Model (Per ESD STM5.2-1999)
125 volts to <250 volts
250 volts to <500 volts
500 volts to <1,000 volts
1,000 volts to <1,500 volts
1,500 volts to <2,000 volts
Table 3 ESDS Component Sensitivity Classification - Charged Device Model (Per ESD STM5.3.1-1999) 
A fully characterized component should be classified using all three models: Human Body Model, Machine Model, and Charged Device Model. For example, a fully characterized component may have the following: Class 1B (500 volts to <1000 volts HBM), Class M1 (<100 volts MM), and Class C3 (500 volts to <1000 volts CDM). .
The basic operation of the I C is that, when we give a digital input to the IC, it should convert the signal to analog signals in form of sine, cosine waves etc. These analog outputs of sine or cosine waves etc. are given to input of analog to digital converters. Now, ADC will convert the analog input to the digital output. This digital output is then obtained. This output is given to the computer-controlled systems that checks if the obtained output is same as the input applied. If the input and output matches, this means that there is no error in the IC. This basic operation carried out in an IC characterization.
In IC characterization the most important element is Digital to Analog converters and analog to digital converters. The parameters of ADC and DAC that are checked includes the ADC fabrication tests, ADC linearity, ADC Integral Non-Linearity, ADC Differential Non-linearity and the percentage of ADC output codes
The resolution of ADC and DAC is used to determine the range of values it can produce. It indicates the number of discrete values it can produce over the range of analog values. The resolution is usually expressed inÂ bits as the values are stored electronically in the binary form. Therefore, the number of discrete values available, or "levels", is in power of two. Here we consider an example; an ADC with a resolution of 10 bits can encode an analog input to one in 1024 different levels, sinceÂ 2 to the power 10Â = 1024. The values can represent the ranges from 0 to 1023 .
Linearity of ADC and DAC
Many ADCs are linear.Â The termÂ linear means that the range of the input values that map to each output value has a linear relationship with the output value, i.e., that the output valueÂ kÂ is used for the range of input values from
M (kÂ +Â b) to M (kÂ + 1 +Â b) .
Due to the physical imperfections all ADCs suffer from non-linearity errors, causing their output to deviate from a linear function of their input. These errors can sometimes be mitigated byÂ calibration or prevented by testing and that is why IC characterization is the most important.
Important parameters for linearity areÂ integral non-linearityÂ (INL) andÂ differential non-linearityÂ (DNL). This non linearity reduces the dynamic range of the signals that can be digitized by the ADC, also reducing the effective resolution of the ADC. For an example if the input to the IC is 0000000011 and we get the output as 0000000010. Now, this error is due to the non linear behavior .
Here, INL describes the non-linearity of Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC).Â INL is considered an important parameter because it is a measure of an ADC or DAC non-linearity error. The maximum deviation of the ADC transfer function from the best-fit line is defined as the Integral Non-Linearity.Â An ADC function is to digitize a signal into a stream of samples. The ADC input is usually connected to an operational amplifier, which are linear circuits and process an analog signal.
Figure 4: ADC Non-Linearity 
To express the non-linearity in a standard way, manufacturers draw a line through the ADC transfer function, called the best fit line.Â The maximum deviation from this line is called INL, which can be expressed in percentage of the full scale or in LSB (List Significant Bit). INL is measured from the center of each step to that point on the line, where the center of the step would be if the ADC was ideal .
This parameter is important because it cannot be calibrated out.Â The ADC non-linearity is unpredictable.Â We don't know where on the ADC scale the maximum deviation from the ideal line is.Â Therefore, if one of the design requirements is good accuracy, we need to choose an ADC with the INL within the accuracy specifications, or a lot less than the specified error.
IC Characterization is done so as to make sure that IC meets its requirements and for that we use IC Characterization procedures.
Many a times all the procedures to fabricate the chip are proper. Also, the materials used are up to the mark. But, still there I C fails it has some errors in it. The reason behind this failure is the proper training given to the employees. Therefore, new and a standardized training programs should be conducted in small or big factory. One should not send employees to the factory without proper skills and proper training .
Workstations and Work surfaces
A proper workstation is used to provide a means to connect work surfaces and equipment and grounding devices to a common ground point. Proper work surfaces should be installed that will provide an electrical path to ground to control the dissipation of any static potentials on materials that contact the surface. The work surface is connected to the common point ground .
Wrist straps are used as means to control the static charge on personnel. Wrist strap keeps the person wearing it near ground potential when it is properly worn and connected to ground. There will not be any hazardous discharge between the person and the objects that are grounded in the work area as the person wearing the wrist strap, which is connected to the same ground, and now the person and object are at same potential and therefore the static charge does not accumulate because it will be dissipated from the person to ground .
Packaging and Handling
The limitation to the impact of ESD from triboelectric charge generation can be done by the proper packaging and handling materials. A low charging and discharge protection and electric field suppression materials are available in the market, should be used. These materials has a low charging layer and an outer layer with a surface resistance which is generally in the dissipative range.