Error Correcting Codes Are Used Computer Science Essay

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Error correcting codes are used for the reliable communication in noisy channel with less power consumption. In error correcting codes redundant bits are insert into the code word that we are transmitting so that receiver can correct the received code word if any error occurs during the transmission. There is various error correcting codes use according to the application.

For the communication system suitable codes are searching which are satisfying following conditions:

Large design space

Decoding speed

Shannon Limit

Low consumption of power

Complexity etc.

In thesis we discuss Low Density Parity Check codes & its application in Digital Video Broadcasting Version 2 (DVB-S2). DVB-S2 is a Satellite broadband application. This system has been designed for the different application such as broadcasting, Internet access, for consumer application integrated receivers and decoder (IRD's) and personal computer, Internet trunking, data content distribution etc. In further chapter we discuss about DVB-S2 in detail.

In this chapter, I start with brief introduction of basic digital communication system and encoding and decoding scheme. Then brief description of error correcting codes and their applications in various communication systems. Then discuss about the Low Density Parity Check code which is used in Digital Video broadcasting version 2 (DVB-S2), their design architecture, their properties and application. Finally, in last chapter we discuss about the related works regarding design architecture of Low density parity Check code and its simulation result.

1.2 Digital Communication

Information Source

Source Encoder

Channel Encoder

Digital Modulator


Source Decoder

Channel Decoder

Digital Demodulator


Channel (wired or wireless)

Fig 1.1 Basic Block Diagram of Digital communication System

or in digital form such as data type. Next is the source encoder which can convert the information signal into a binary sequence. Then the channel encoder add some extra bits called redundant bits into the coded binary sequence that can overcome the noise effects at the time of transmission. Now the digital modulator modulates the binary sequence and converted into signal waveform. This signal transmitted through the physical medium called channel which may wire (cable) or wireless (air). At the time of transmission signal is corrupted due to unwanted signal called noise due to atmosphere, electronic device etc. At the receiving end corrupted signal is demodulated and converted into binary sequence. Then channel decoder reconstructs the original sequence by the knowledge of the code use at the transmission end. Now the source decoder retrieves the original message and sends it to destination.

1.3 Error Correcting Codes

In error correcting codes (ECC) extra bits called redundant bits are added in the encoded bits which are transmitting to permit the error detecting and correcting at the receiver end. These are use to correct the error due noise, fading, interference etc.

In 1948, Claude Shannon founded the noisy channel coding theorem in field of "Information Theory" [2]. In which he introduce that information can be quantified. He gives theorem called Shannon Theorem. The theorem states that for a Additive White Gaussian Noise (AWGN) channel of band width W channel capacity C is given by:

C = W log2 bits per second (1.1)

Where is the average signal energy and is the two sided noise power spectral density. The proof of this theorem is that if R is transmission rate and C is the channel capacity then transmission rate R less than or equal to channel capacity C, for error free transmission. If R is greater than C the probability of error is equal to unity.

Following table 1.1 shows the applications and required coding scheme according to that application:

Table 1.1 List of codes used in different area

Name of Code


Wireless Communication Satellite Downlink

Convolution codes, turbo codes, LDPC

Tape recorder

Reed Solomon Code

Magnetic Discs

Hamming code

Computer Network


CD Player

Reed Solomon Code

1.4 Low Density Parity Check (LDPC) Codes

In 1962 LDPC codes are first proposed by R. Gallager. Due to high complexity LDPC codes are ignored in past years. Recent years because of excellent performance LDPC codes are widely consider in communication. LDPC codes are linear block codes defined by sparse parity check matrix. These codes are rediscovered by MacKay in 1999.

1.4.1 Fundamentals of Linear block codes

Linear block codes of (n, k) are completely defined by two matrixes called Generator Matrix G which is at the transmitting end and Parity Check Matrix H which is at the receiver end where n is number codeword and k is number of message bits.

By Minimum hamming distance (dmin) determine the minimum correcting capacity of errors in the given code words

(dmin) is the minimum weight of Generator matrix's G row or minimum weight of parity matrix's H column.

For Example: Generator matrix and Parity check matrix of (7, 4) codes:

Generator matrix G = [Ik | P] k*n where P is parity matrix

n = 7 & k = 4

1 0 0 0 1 1 1

0 1 0 0 1 1 0

0 0 1 0 1 0 1

0 0 0 1 0 1 1

G =

H = [PT | In-k] (n-k)*n where PT is transpose of P

1 1 1 0 1 0 0

1 1 0 1 0 1 0

1 0 1 1 0 0 1

H =

1.4.2 Representation LDPC Codes

LDPC codes are represented by two methods first one is by the matrix representation same as all the linear block codes and second one is by the graphical representation. These are explaining as follows: Matrix Representation

Let us take an example of LDPC code with the dimension of n x m (8, 4). The following matrix represents the parity check matrix:

0 1 0 1 1 0 0 1

1 1 1 0 0 1 0 0

0 0 1 0 0 1 1 1

1 0 0 1 1 0 1 0

H =

In this matrix Wr & Wc are the No. of 1's in row and column respectively. For low density condition Wr << m & Wc << n. Graphical Representation

For LDPC codes in 1981 Tanner introduce the graphical representation which is partially represent these codes and help to explain the decoding algorithm. Figure 1.2 represents the graphical representation of LDPC codes.

In graphical representation there is m number of check nodes and there is n number of variable nodes. If element hij of matrix H is 1 then check node ci is connected to the variable node dj.

c0 c1 c2 c3 Check nodes

Variable nodes

d0 d1 d2 d3 d4 d5 d6 d7

Fig: 1.2 Graphical representations of LDPC codes

1.4.3 Regular & Irregular LDPC Codes

In regular for every column Wc is constant and Wc=Wr then LDPC code is regular LDPC code, otherwise code is irregular LDPC code.

Comparison between the error correcting codes shows in Table 1.2. Chung [3] showed that a rate ½ LDPC code with 107 AWGN channel which can achieve the Shannon limit 0.0045dB.

Table 1.2 Comparison of different channel codes Performance

Code type

Shannon Limit










1.5 Digital Video Broadcasting Version 2 (DVB-S2)

In new DVB-S2 [3] powerful forward error correction codes are used for transmission system that enables the transmission close to the Shannon limit. LDPC codes are used in DVB-S2 for better performance. In previous systems another different codes are used with a huge codeword i.e. up to 64800 bits for the outstanding performance in communications. LDPC having huge codeword in their architecture that's way in recent years LDPC codes are use.

Two linear codes BCH and LDPC codes are use. BCH codes are used to help clean up additional errors at the output of the LDPC decoder to improve the performance.

1.6 Thesis Contribution

1.7 Thesis Organization

In chapter-2 I discuss the history of DVB-S2 and LDPC codes with various LDPC encoding and decoding algorithms.



2.1 DVB-S2

In 1993 the European Telecommunication Institute (ETSI) [3] introduce Digital Video Broadcasting (DVB) project for digital television services. Initially it used a concatenation of an outer (204,188) Reed Solomon code with constraint length 7 and variable rate Convolutional code.

DVB-S2 is the latest standard in which the concatenated Reed Solomon coding of DVB-S with a concatenation of outer BCH code and inner LDPC code. In result capacity of DVB-S2 is 30% increase over DVB-S.

New standard presents a powerful error correction system, which enables transmission nearest to the Shannon limit. LDPC code is making it possible because of huge codeword length. LDPC coding gives the outstanding performance (≈0.7 dB to Shannon limit).

2.1.1 DVB-S2 Transmission System

Figure 2.1 shows the DVB-S2 transmission system [3] which is explain as follows:

2.1.2 Mode and Stream Adaptation

This part of transmission system provides input stream interfacing, input stream synchronization which is optional, null packet input stream deletion only for the ACM and Transport Stream input format, CRC coding for error detection at packet level and slicing into data fields. This block also provides padding to complete the base band frame and base band scrambling.

2.1.3 FEC Encoding

This block will carried out by concatenation of BCH outer codes and LDPC inner codes with rates 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/4, 4/5, 5/6, 8/9, 9/10.FEC coded block will have the length of 64800 or 16200 bits that is according to the application area. In this block next block is bit interleaving which applied to FEC encoded bits for 8PSK, 16APSK and 32APSK.

By using a block interleaver the output of the LDPC encoder will be interleaved for 8PSK, 16APSK and 32APSK modulation formats. In interleaver data are serially written

Rates 1/4, 1/3, 2/5, 1/2 , 2/3,3/4,4/5,5/6,8/9,9/10


Mode and Stream AdaptionSingle





Bit Interleaver








α = 0.35, 0.25, 0.20






PL Signaling



PL Scrambler

Bit Mapper Into constellations


the RF



Fig: 2.1 DVB-S2 Transmission Systems

column wise and serially read out row wise.

LDPC codes have decoding algorithm which consists of simple operations such as addition, comparison and look-up table.






nLDPC bits

Fig: 2.2 Data format before bit interleaving

(For normal FECFRAME nLDPC =64800 bits, for short FECFRAME nLDPC =16200 bits)

2.1.4 Mapping

Mapping QPSK, 8PSK, 16APSK and 32APSK constellation with Gray mapping will be applied after bit interleaving according to the application area.

Each FECFRAME must be converted to parallel sequence. Each parallel sequence will be mapped into constellation. This mapping generates a sequence of variable length (I, Q) depending on the selected modulation efficiency ηmod.

FECFRAME is the input sequence and XFECFRAME is output sequence. Complex outputs are composed of 64800/ ηmod or 16200/ ηmod modulation symbols. Each in format of complex vector (I, Q) (I is In phase component and Q is Quadrature phase component).

System employs Convolutional Gray coded modulation with absolute mapping for QPSK and 8PSK. Bit mapping for QPSK and 8PSK are shown in Figure 2.3 and 2.4 respectively.




10 ρρ 00 Q=LSB


11 01

Fig: 2.3 QPSK Constellation Diagram



ᶲ=π/4 100

10 ρρ 000 Q=LSB

010 I 001 I

011 101


Fig: 2.4 8PSK Constellation Diagram


1110 1100 π/6

1111 1101 R2 The 16APSK modulation constellation is composed of two centric rings of 4 and 12 PSK points with uniform spaced and the radius of inner ring is R1 and the outer ring is R2. If 4[R1]2 + 12[R2] 2= 16 and the average signal energy becomes 1. 16APSK constellation is shown in figure 2.5.


1010 1000

0010 0000

0110 0100


0111 0101

0011 0001

1011 1001

Fig: 2.5 16APSK signal constellation

The 32APSK modulation is composed of three concentric rings with uniform space of 4, 12 and 16PSK points in the inner ring of radius R1, the intermediate ring of radius R 2 and the outer ring with radius R3, respectively. If 4[R1]2 + 12[R2] 2+16[R3]2=32, the average signal power becomes equal to 1. The signal constellation shown in figure 2.6.