Design And Implementation Of A Sequence Decoder Computer Science Essay

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First of all, its too important now days to understand and cover the all stages on the the engineering field, also discover and see the way of the modern technology and how it developed by the time goes on, and applying the new knowledge depending on what's related with.

Therefore, this assignment include two different technologies ways on implementing the design of the sequence decoder, the two technology types are called (CPLDs) which is the Complex Programmable Logic Devices, and the Microcontroller technology for Microchip PIC.

The two technologies of (CPLDs) and Mirochip PIC Microcontroller implementation are used on the work field to implement on prototypes that they have to be prepared after they designed to prove that they worked fine after the codes implementation.

Finally, this practical assignment should shows the experience of solving problems, and give fast solution on troubleshooting cases, that will effect in the engineering field plan, on the second hand, it's a good chance to improve my skill works after achieving the completed steps.

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The main objective of this project is to develop a sequence decoder system using a finite state machine (FSM) and build a prototype using the form of CPLD system and PIC microcontroller system, for the project. The assignment consists of two chapters, Chapter 1 and Chapter 2.

Chapter one shows the process on implementing and using the technology of (CPLD), and for chapter two, shows the implementation section of using the microchip microcontroller PIC.

A data of serial stream decoder have to be implemented to a unique header sequence that will be detected, after that the option of increment and decrement counter. The counter should be displayed on a seven segment counter from (00_99) and the other seven segment should give the state value. The data stream got six bit header sequence, adding to it one bit for data, the data value bit is used to increment logic 1 or decrement logic 0, All students have their own header sequences.

By using The Xilinx CoolRunner-II CPLDs to design and implement, the development kit is ready to use by implementing the codes with the program into the kit, it got the slide switch for switching mode, push buttons to increment and decrement states.

A serial data stream decoder has to be implemented and after that will detect a unique header sequence for each student, every student has deferent sequence (0 0 1 0 1 0) my header sequence for example to Implement and then increment and decrement value for the state.

The two seven segments is to be displays from (00) to (99) and another seven segment display is used to give the value of state into the Finite State Machine of the sequence detector.

Chapter two is about implementing the prototype by using the microchip microcontroller PIC, after building and installing the board kit containing some specific components.

The plan of the sequence decoder system it has the same operation as explained with using different components and install on other ways are used to reach the main target and result. The system is controlled by the Microchip PIC18. Push buttons components one Increment and Decrement type. LEDs are used to show the operation working well.

In this report we will discover the way of designing, implementation, analyzing, and give an explanation about the CPLDs VHDL technology and the Microchip PIC technology that uses on the both sides of the basic point analyses needed in the design of the sequence decoder system.

CHAPTER 1

INTRODUCTION TO CPLDS

PROBLEM ANALYSIS

SPECIFICATION

IMPLEMENTATION

RESULTS

INTRODUCTION TO CPLDS

In this chapter will be shown the way of (PLDs) Programmable Logic Devices and (CPLDs) Complex Programmable Logic Devices, and the process of using them to design and build prototypes of hardware for the sequence decoder system.

The logic device is a device that contains combine types of many logic circuits, same as OR gates, AND gates, NAND gates. The logic devices consist of two types, the first type is the fixed logic device, the second type called the programmable logic device.

The PLD logic device gives special functions, adding the device on other devices, all over the situation of time, control, and showing data display system, where must made it with every function needed. Because of the letter that got its continued stay logic devices and it made of, which is the PLDs have changed it, it cannot changed or replaced to give any number to do it job. Low cost software's and equipments are used by the designer to get good result for long run to develop, test, and simulate their projects on their plans. After that, the way for programming and perform the implementation work could be easy and simple.

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There are two main types of PLDs:

1- (FPHAs) which is the Field Programmable Gate Arrays.

2- (CPLDs) which is called the Complex Programmable Logic Device

In this working report, we used the Xilinx CoolRunner-II for coding and implementation. Many logic blocks are found on a CPLD, it looks like a small CPLDs that contain approximately 10000 gates on, it can also share and communicate together. Xilinx CoolRunner-II spend low power rate that costs low also, it just need 1.8 volts.

THE PROBLEM ANALYSIS:

In this section of the report, shows the buildup of the prototype with different parts and components to install, on building the CPLD prototype for the header sequence system with using The Xilinx CoolRunner-II board on the plan of prototype device.

The board contains some components are listed below:

(XC2C256) The main circuit of CPLD integrated circuit.

Seven segments display, four displays on.

USB point port.

Power supply external.

Crystal oscillator.

Two switches worked on slide, and two buttons.

A/D converter using on 3 channels with 16 bit.

Silicon oscillator of 1MHZ.

Connectors (j1, j2, j3, and j4).

Parallel connectors.

C:\Users\faisal\Desktop\R6973383-10.jpg

Figure 1: starter kit of Xilinx CoolRunner-II

Expansion slots

Push buttons

Seven segment display

(USB) programming data use

(clock) jumper

Led lights

Slide switches

CoolRunner-IIC:\Users\faisal\AppData\Local\Temp\Rar$DR15.810\vhdl pics\DSC01510 (Small).JPG

Figure 2: Xillinx CoolRunner-II Board

Seven Segment Display

There is four seven segment display on the system board, they connected in parallel connection with controlling the current from the other pins points.

Figure 3: seven segments

Input system:-

-Power supply input to the system.

-Header with 6 bits.

-Increment or decrement value.

-Clock.

Output system:-

-It should be from (00) to (99) on seven segment display.

-The system communicates between the computer and the board, serial converting of 8 bits used to transmit data.

-One sequence of data looks like the following:

0

1

2

3

4

5

6

7

data bit

header

header

header

header

header

header

clock

-Testgen is a sequence generator that generates the unique header sequence and passes into any comport formed into the system.

-inside the system will be a computer that increment and decrement with the logic is zero, the system present the value from (00-99).

-the output will take the FSM, other two zero and one value.

-selecting 3 bits from the selector.

Block diagram:-

Diagram one:

Process

Input

Output

Diagram two:

Power (input)

Serial data

Decoder(output)

7segment

Display

testgen Clock

Data

1.3 SPECIFICATION

Flow chart

Start

Clock

Testgen

g

Is header=001010

Data bit

No Logic0 logic1

Decrement

Increment

Stop

Flowchart 1: sequence decoder

Finite state machine

Sequence (001010)

0/0 0

Stage-4

0100

Stage-3

0011

Stage-2

0010

Stage-1

0001 1 1/0 0 0/0 1 1/0 0 0

Stage-5

0101

0/0

Stage _start

0000

0/0 0/0

1/0 1/0

Stage-6

0110

0/0

0

1/0 1/1

Stage-inc

01111 0/0

1/0

Stage-dec

1000 0/0 0/1

1/0

State diagram 1: finite state machine

Seven Segment Display

Digit Shown

Cathode Signals

a

b

c

d

e

f

0

0

0

0

0

0

0

1

1

0

0

1

1

1

2

0

0

1

0

0

1

3

0

0

0

0

1

1

4

1

0

0

1

1

0

5

0

1

0

0

1

0

6

0

1

0

0

0

0

7

0

0

0

1

1

1

8

0

0

0

0

0

0

9

0

0

0

1

1

0

Table 1: Segment Signals of the Seven Segment Display

Push Buttons

The xilinix boards used the push buttons connecting with the slide switches for the situation mode and increment the state of the finite machine.

The two push buttons is for the increment and decrement with the logic of zero on decrement, logic one on increment.

1.4 IMPLEMENTATION

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In this Figure below shows the prototype board and its implementation of the CPLD hardware for the sequence header system.

C:\Users\faisal\Desktop\2010_2011\vhdl pics\DSC01522 (Small).JPG

Figure 3 : Prototype Board Hardware for CPLD VHDL

RESULTS

The hardware operation was gone successful and the problem of the coding also, the prototype hardware has been build and installed but it doesn't work well, it does shows the state only, and the software work for the code implementation worked successfully and reach the main target for the idea of the sequence decoder system implementation.

The software package tools for performing the VHDL to program and implement, VHDL refer to a Very High Speed, it is developed and used to improve the design and take the result for the circuit that is proven, and the structure of the program has the ability and power on writing and describe the logic of controlling system.

The VHDL perform many levels of design type to control design a project and control during the implementation step, it helps the user on creating the design.

It gives the chance for the designer for creating, using the language for designing and simulating, if one design is created, many types of models and styles are shown to get more solutions on getting the suitable results at the end.

So the program language is used and with getting the screenshots of the results, it can be found in the following page, and about the codes, it can be found in the appendix part.

C:\Users\faisal\Desktop\hardware output\Image_1.bmp

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Figure 4: successful result

C:\Users\faisal\Desktop\hardware output\Image_2.bmp

Figure 5: the results in full

C:\Users\faisal\Desktop\hardware output\Image_2.bmp

Figure 6: the result for the process

CHAPTER 2

INTRODUCTION TO MICROCHIP PIC

PROBLEM ANALYSIS

SPECIFICATION

DESIGN

IMPLEMENTATION

RESULTS

2.1 INTRODUCTION TO MICROCHIP PIC

This part is about to use the microchip microcontroller system to implement the sequence decoder system and build the prototype from the component that have to installed and connect the final circuit with the ICD2 and powered up to achieve the goal plan.

Firstly, the CPU chip that quantity of ROM, RAM, and also the port of I/O, and the timer also included in one place for the chip.

There is a lot of different between microprocessor and the embedded controller, the microprocessor it worked and designed to implement with many types of programs that's be able to connect with them whatever the output device driver even on external types, for the embedded controller that it customize to do certain part for the jop that needed to check through.

A single program is included into the embedded controller which has advantage point that it cheap and can catch up to control the lead on powering and get the target part. Also about the (CPU) that called the central processing unit, its high cost where the microprocessor can be connected with many ways and types of externals and devices.

PROBLEM ANALYSIS

The board consists of three seven segment displays, PIC18f1320 connected through the board by the ports on the PIC device, wires and resistors.

The equipment developments that used to implement the prototype included the mplab icd2 that used to connect with the circuit board for debuggin, and circuit serial programmer to do them for operations of debugging and programming for the PIC18F1320 and get the results on time.

The way of connecting the ICD2 is simple; the USB wire is connected to the PC driver, the other way attached to the ICD2, a connection go through the PIC from ICD2, and then plug in the power supply.

MPLAB, ICD 2, and C compiler are used to implement the project from programming and debugging the connected board.

ICD 2

Pic 18f1320 device

USB cable

Power supplyC:\Users\faisal\Desktop\university\hardware\hardware pics\IMG00114-20100315-1251.jpg

Figure 7: development tools

SPECIFICATION

There is a deference with the CPLD prototype that it's include the PIC18F1320 which is the controller on this system, ICD2 to connect to debugging the project, USB cable and a power supply that generate the power to complete the process.

2.3 DESIGN

For designing the prototype, and show the hardware how its look like, ISIS software is used on the designing section for this implementation part.

H:\mm.jpg

Figure 8: the design for PIC prototype hardware

2.4 IMPLEMENTATION

The implementation section for the sequence decoder system by using PIC prototype board.

C:\Users\faisal\Desktop\IMG_0064.jpg

Figure 8: testing the seven segments

Test plan

Test plan is a test for hardware and software operation, after completing the process for the prototype, and the software coding part.

In testing the hardware part, same as checking the seven segment display, insure of the resistors and transistors, and the most important part is to check the short circuit to have the full known idea that the work is fine.

The software part checking the codes of sequence including the display for the operation with seven segments display.

test

description

pass

fail

1

Sequence code for state finite machine building

2

Testing hardware for the seven segment display

3

Short circuit test

4

Simulation on ISIS

5

Programming to the microcontroller

6

Seven segment display test

7

Output operation after debugger

Table 2: test plan

NOTES:

The sequence codes showed good results and successful.

On testing the hardware after finishing the soldering part, give good result except the c segment part for the first seven segments, and try to solder again without getting fixed.

The short circuit gave good result.

Simulation on ISIS doesn't work, tried the demo version, and get other laptops after the demo.

Programming step wasn't complete, because of the ICD2; other devices are replaced without anything appeared.

2.5 RESULTS

After finishing from the prototype from soldering the pins and connecting the wires on the right places, it shows that worked fine after testing the board with using power supply from the output and input pins, the seven segments gave a good Impression.

The other step is to program the microcontroller to be sure that codes is mandating for the plan of PIC prototype board.

The c language is widely used by the programmers, where its effective in the way of using, the c compiler run the written codes directly, that mean it run the program into the performance that give the system the direct operation run.

Software and hardware MPLAB are given to make and create the design and implement the system via microchip controller, by using codes after writing them to program it into the prototype that attached with PIC18F1320.

After writing the codes, the transfer option guided to download the order to microcontroller and monitor the prototype work.

The result for the c programming codes

C:\Users\faisal\AppData\Local\Temp\Rar$DR06.704\PIC ScreenShot.bmp

Figure 9: Microchip PIC Results

RESULTS ANALYSIS

After the design and build the hardware system work via PIC microcontroller, we reached a result and have some good results, seven segments worked well during the testing, the software program went successful, the prototype circuit board give no result because of many errors found on the connector ICD2 into the PC driver, many changes have been done with replacing the ICD2 or upgrading the driver for PC even using another PCs, also after checking the settings, the value of the supply input that work for generating the circuit power, it shows a big differences even its plug of, that it couldn't achieve the amount is needed to complete the plan and improve the idea.

On the other hand, the VHDL went to successful run software; at the beginning it showed the states on the testing plan, after completing the software, the board give one value of state without discovering the main reason on time.

The VHDL look like heavy in use sometimes and the procedure went fast good at same time, so to describe on parallel system, which consist of parts of the programming system, we can be sure during the work on same time period.

Also for the C programming language, one of the advantages that it got, it worked on sequence that perform direct, it's easy for some programmers and reverse for others, that they prefer the VHDL for many reasons, even though both of them are the most intelligent develop language programs.

CONCLUSION

Finally, many good results has been completed although the hardware part wasn't looked enough good for many reasons, the coding part carried out on the right way. This projects assignment gave me a good chance to improve my skills, and examine my ability on covering the bases of this work, on researching, installing, and get the knowledge with benefits of practical skill also that will help me on my engineering field.

The process of this big project gave the confidence ability, with learning much for the both languages technologies.

Therefore, with having a good experience with this new field for me, i shall be ready to manage any idea with confidence ability.