# Reduced Common Mode Voltage In Vector Controlled Induction Biology Essay

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The SVPWM algorithm distributes the zero voltage vector time equally among the two zero voltage vectors. Due to the presence of zero voltage vectors the SVPWM algorithm results in large common-mode voltage (CMV) variations. In the induction motor drives, the poor CMV characteristics lead to prohibitive amount of common-mode current (CMC). In induction motor drive applications, this may lead to motor bearing failures, electromagnetic interference (EMI) noise, or interference with other electronic equipment. Such problems have increased recently due to increasing PWM frequencies and faster switching times. The filters can be utilized to suppress the effect of the CMV from the source. However, these methods involve additional hardware, and thus, they significantly increase the drive cost and complexity. An alternative approach is to modify the pulse pattern of the standard PWM algorithm such that the CMV is substantially reduced from its source and its effects are mitigated at no cost.

## 6.2 Proposed AZSPWM Switching Sequences:

The SVPWM algorithm divides the zero state time equally between the two possible zero voltage space vectors. The usage of zero voltage vectors increases the common mode voltage variations. Hence, in order to reduce the common mode voltage variations, the proposed AZSPWM algorithms use two active opposite voltage vectors in place of zero voltage vectors with equal time duration for composing the reference voltage vector. These two active opposite voltage vectors with equal time create effectively a zero voltage vector. Any one of the three pairs V1-V4, V2-V5, V3-V6 can be used.

This thesis presents only two sequences for reduced common mode voltage variations. The switching sequences of two AZSPWM algorithms are shown in Table.6.1. In the proposed AZSPWM algorithms, the zero state time is divided equally among the two active voltage vectors in each sector.

Table-6.1: Switching sequences of the AZPWM algorithms in all sectors

Type of PWM

Sector 1

Sector 2

Sector 3

Sector 4

Sector 5

Sector 6

SVPWM

0127-7210

0327-7230

0347-7430

0547-7540

0567-7650

0167-7610

AZSPWM1

3216-6123

4321-1234

5432-2345

6543-3456

1654-4561

2165-5612

AZSPWM2

5122-2215

6233-3326

1344-4431

2455-5542

3566-6653

4611-1164

## AZSPWM Algorithms Based Vector Controlled Induction Motor Drive:

In the vector controlled induction motor drive, a VSI is supposed to drive the induction motor so that the slip frequency can be changed according to the particular requirement. Assuming the rotor speed is measured, and then the slip speed is derived in the feed-forward manner. For decoupling control, it is desirable that the rotor flux is aligned onto the d-axis of the synchronously rotating reference frame, then . The block diagram of proposed vector controlled induction motor drive is as shown in Fig. 6.1.

Sc

Sb

Sa

ib

ia

ids

iqs

V*qs

V*ds

ids

iqs

iqs*

ids*

Ï‰r

Ï‰r

Slip & Angle Calculation

3-Phase Inverter

3-ph to

2-ph

Speed controller

PI

2-ph to

3-ph

A

Z

S

P

W

M

Field weaken control

PI

IM

Va

Vb

Vc

Vdc

## Fig. 6.1 block diagram of proposed AZSPWM algorithms based vector controlled induction motor

This shows how the rotor flux linkage position can be obtained by integrating the sum of rotor speed and actual speed. In the vector control scheme, to regulate and rotor speed to desired values are the two objectives. Apparently the stator voltages that are required to generate the desired rotor flux linkage and rotor speed are not directly related to these variables. So the alternative way is to regulate the rotor flux linkage and rotor speed through PI controllers and the outputs of these two controllers give out the reference values for the q- and d-axis stator currents in synchronous reference frame. Then the actual q- and d-axis stator currents are regulated to these two reference currents to get the stator voltages. Then these two-phase voltages are converted into three-phase voltages and given to the AZSPWM block, which generates the gating pulses to the VSI.

## Simulation Results and Discussions:

To validate the proposed algorithms, the numerical simulation studies have been carried out using MATLAB. For the simulation studies, the average switching frequency of the inverter is taken as 5 kHz. The induction motor used in this case study is a 4 kW, 400V, 1470 rpm, 4-pole, 50 Hz, 3-phase induction motor having the following parameters:

Rs= 1.57Î©, Rr = 1.21Î©, Ls = 0.17H, Lr = 0.17H, Lm = 0.165 H and J = 0.089 Kg.m2.

The steady state simulation results of SVPWM algorithm and proposed AZSPWM algorithms based vector controlled induction motor drive are shown in from Fig. 6.2 to Fig. 6.4 along with the harmonic spectra of line current and common mode voltage variations.

From the simulation results, it can be observed that the SVPWM algorithm results in large common mode voltage variations and the proposed AZSPWM algorithms result in less common mode voltage variations. However, the proposed AZSPWM algorithms give more harmonic distortion when compared with the SVPWM algorithm because of opposite pulses in the line voltages. Thus, the proposed AZSPWM algorithms give reduced common mode voltages and hence reduced common mode currents when compared with the SVPWM algorithm without any extra hardware requirements.

(a)

(b)

(c)

Fig. 6.2 SVPWM algorithm based vector controlled induction motor drive (a) steady state plots (b) Harmonic spectra of line current (c) variation of common mode voltage

(a)

(b)

(c)

Fig. 6.3 AZSPWM1 algorithm based vector controlled induction motor drive (a) steady state plots (b) Harmonic spectra of line current (c) variation of common mode voltage

(a)

(b)

(c)

Fig. 6.4 AZSPWM2 algorithm based vector controlled induction motor drive (a) steady state plots (b) Harmonic spectra of line current (c) variation of common mode voltage.

## Conclusions:

Novel AZSPWM algorithms based on the concept of imaginary switching times are presented in this thesis for vector controlled induction motor drive. The proposed algorithms did not use the information of angle and sector and hence reduces the complexity involved in the conventional space vector approach. From the simulation results, it can be observed that the proposed algorithms reduce the common mode voltage variations when compared with SVPWM algorithm with slight increased ripples in current and torques. In the proposed AZSPWM algorithms, AZSPWM2 gives better performance when compared with the AZSPWM1 algorithm.

## Proposed NSPWM Algorithm:

The near state PWM (NSPWM) algorithm uses a group of three neighbor voltage vectors to construct the reference voltage vector. In order to reduce the common mode voltage variations, the proposed NSPWM algorithm did not use the zero voltage vectors. These three voltage vectors are selected such that the voltage vector closest to reference voltage vector and its two neighbors are utilized in each sector. Hence, the utilized voltage vectors are changed in every sector as shown in Fig. 6.5, to apply the method, the voltage vector space is divided into six sectors. Here also, as all six sectors are symmetrical, the discussion is limited to the first sector only. For the required reference voltage vector, the active voltage vectors (V1, V2 and V6) times can be calculated as in (6.1), (6.2) and (6.3).

(6.1)

(6.2)

(6.3)

V1 (100)

V2 (110)

V3 (010)

V4 (011)

V5 (001)

V6 (101)

I

II

III

IV

V

VI

Fig.6.5 Possible voltage space vectors and sector definition in Â Â Â NSPWM algorithm

But, in the NSPWM algorithm, the (6.1), (6.2) and (6.3) have a valid solution when the modulation index is varying between 0.61 and 0.906. In order to get minimum switching frequency and reduced common mode voltage the NSPWM algorithm uses 216-612 in sector-I, 321-123 in sector-II and so on.

The total number of commutations in SVPWM algorithm is three in a sampling time interval, where as the number of commutations in NSPWM algorithm is two. Moreover, the modulating waveform of NSPWM algorithm is similar to the DPWM1 waveform and hence any one of the phases is clamped to the positive or negative DC bus for utmost a total of 1200 over a fundamental cycle. Hence, the switching losses of the associated inverter leg are eliminated. Hence, the switching frequency of the NSPWM algorithms is reduced by 33% compared with SVPWM algorithm

## Drive

In the vector controlled induction motor drive, a VSI is supposed to drive the induction motor so that the slip frequency can be changed according to the particular requirement. Assuming the rotor speed is measured, and then the slip speed is derived in the feed-forward manner. The block diagram of proposed vector controlled induction motor drive is as shown in Fig. 6.6. This shows how the rotor flux linkage position can be obtained by integrating the sum of rotor speed and actual speed. In the vector control scheme, to regulate and rotor speed to desired values are the two objectives.

Sc

Sb

Sa

ib

Ia

ids

iqs

V*qs

V*ds

ids

iqs

iqs*

ids*

Ï‰r

Ï‰r

Slip & Angle Calculation

3-Phase VSI

3-ph to

2-ph

Speed controller

PI

N

S

P

W

M

Field weaken control

PI

IM

Vdc

Fig. 6.6 block diagram of NSPWM based vector controlled induction

motor drive

Apparently the stator voltages that are required to generate the desired rotor flux linkage and rotor speed are not directly related to these variables. So the alternative way is to regulate the rotor flux linkage and rotor speed through PI controllers and the outputs of these two controllers give out the reference values for the q- and d-axis stator currents in synchronous reference frame. Then the actual q- and d-axis stator currents are regulated to these two reference currents to get the stator voltages. Then these two-phase voltages are converted into three-phase voltages and given to the NSPWM block, which generates the gating pulses to the VSI.

## Simulation Results and Discussions

To validate the proposed NSPWM algorithm, the numerical simulation studies have been carried out using MATLAB. For the simulation studies, the average switching frequency of the inverter is taken as 5 kHz. In order to maintain the constant average switching frequency, the switching frequency of SVPWM algorithm is taken as 5 kHz and that of NSPWM algorithm is 7.5 kHz. The induction motor used in this case study is a 4 kW, 400V, 1470 rpm, 4-pole, 50 Hz, 3-phase induction motor having the following parameters: Rs= 1.57Î©, Rr = 1.21Î©, Ls = 0.17H, Lr = 0.17H, Lm = 0.165 H and J = 0.089 Kg.m2.

Fig. 6.7 Steady state plots of SVPWM algorithm based vector controlled

induction motor drive

Fig. 6.8 Harmonic spectra of line current in SVPWM based vector

controlled induction motor drive

Fig. 6.9 Line voltage waveform of SVPWM algorithm based vector

controlled induction motor drive

Fig.6.10 Common mode voltage variations in SVPWM algorithm based

vector controlled induction motor drive

Fig. 6.11 Steady state plots of NSPWM algorithm based vector

controlled induction motor drive

Fig. 6.12 Harmonic spectra of line current in NSPWM algorithm based

vector controlled induction motor drive

Fig.6.13 Line voltage waveform of NSPWM algorithm based vector

controlled induction motor drive

Fig.6.14 Common mode voltage variations in NSPWM algorithm based

vector controlled induction motor

The simulation results of SVPWM algorithm based vector controlled induction motor drive are shown in Fig.6.7-Fig.6.10 and of NSPWM algorithm based drive are shown from Fig. 6.11 to Fig. 6.14. It can be observed that the NSPWM algorithm gives more THD but gives less common mode voltage variations when compared with the SVPWM algorithm.

Also, as the proposed algorithm clamps any one of the phases for a total period of 120 degrees over a fundamental cycle, it reduces the switching losses of the inverter and also the switching frequency of the inverter is 2/3 times to that of the SVPWM algorithm.

## Conclusions

The novel AZSPWM algorithm reduces the common mode voltage variations when compared with SVPWM algorithm with slight increased ripples in current and torques. In the proposed AZSPWM algorithms, AZSPWM2 gives better performance when compared with the AZSPWM1 algorithm.

In the proposed NSPWM algorithm gives less common mode voltage variations when compared with the SVPWM algorithm with slight increase in harmonic distortion. Also, as the proposed NSPWM algorithm is a bus-clamping sequence, it reduces the switching losses by 33.33%. Hence, the switching frequency of the proposed NSPWM algorithm is also less when compared with the SVPWM algorithm.