# Novel Cascaded H Bridge Multilevel Inverter Biology Essay

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Multilevel converters are mainly utilized to synthesis a desired single- or three-phase voltage waveform. The desired multi-staircase output voltage is obtained by combining several dc voltage sources. Solar cells, fuel cells, batteries and ultracapacitors are the most common independent sources used. One important application of multilevel converters is focused on medium- and high-power conversion. Nowadays, there exist three commercial topologies of multilevel voltage-source inverters: neutral point clamped (NPC), cascaded H-bridge (CHB), and flying capacitors (FCs). Among these inverter topologies, cascaded multilevel inverter reaches the higher output voltage and power levels (13.8 kV, 30 MVA) and the higher reliability due to its modular topology.

Diode-clamped multilevel converters are used in conventional high-power ac motor drive applications like conveyors, pumps, fans, and mills. They are also utilized in oil, gas, metals, power, mining, water, marine, and chemical industries. They have also been reported to be used in a back-to-back configuration for regenerative applications. Flying capacitor multilevel converters have been used in high-bandwidth high-switching frequency applications such as medium-voltage traction drives. Finally, cascaded H-bridge multilevel converters have been applied where high power and power quality are essential, for example, static synchronous compensators active filter and reactive power compensation applications, photovoltaic power conversion, uninterruptible power supplies, and magnetic resonance imaging. Furthermore, one of the growing applications for multilevel motor drives is electric and hybrid power trains.

For increasing voltage levels the number of switches also will increase in number. Hence the voltage stresses and switching losses will increase and the circuit will becomes complex. By using the proposed topology number of switches will reduce significantly and hence the efficiency will improve.

In high power applications, the harmonic content of the output waveforms has to be reduced as much as possible in order to avoid distortion in the grid and to reach the maximum energy efficiency. The challenge associated with techniques is to obtain the analytical solutions of the non-linear transcendental equations that contain trigonometric terms which naturally exhibit multiple sets of solutions. Generally the lower order harmonics are causing more effects when compared to the higher order harmonics. It is big challenge for any researcher to eliminate the third order harmonics using simple techniques. For a motor load its effects are high. This paper proposes method to eliminate lower order harmonics.

In this paper Selective Harmonics Elimination technique is used. Third and fifth harmonics are eliminated by using this technique. The transcendental non-linear equations are solved using the numerical technique called Newton Raphson method. Traditional two and three level inverters are investigated with the harmonic analysis and cascaded H-bridge seven level inverter is modelled and harmonic analysis is carried out. Finally the proposed topology is presented with the implementation of SHE. The THD values for the Traditional, Conventional and Proposed inverters are compared and analysed.

II. TRADITIONAL INVERTERS

Generally inverters can be divided in two major groups: "single-phase inverters" and "three-phase inverters". The simplest inverter structure is half bridge single-phase inverter which generates 2-level square waveform, whereas output waveform of a full-bridge single-phase inverter is 3-level square waveform.

Three Level Inverter

In the three level inverter zero level is added with two level inverter. The output voltage waveform is similar to the two level inverter.

The power circuit of three level inverter is composed of four power switches. The same switches in same leg should not be turned on in order to avoid the short circuit with dc source. In three level inverter when (S1,S2) are on and (S3,S4) are off, load voltage is equal to +Vdc whereas, in the case of (S1,S2) are off and (S3,S4) are on, -Vdc is seen on load. To apply zero voltage on load, (S1,S4) should be on and (S2,S3) should be off or vice versa. The switching scheme for three level inverter is shown in the table 2.

The state 1 describes that when S1 and S3 are turned on the source voltage is fed to the load. In the state 0 there is no connection between source and load hence output voltage is zero. Whereas in state -1 the source is connected to load in the reverse direction as that of state 1. Hence the voltage is in reverse direction. This can be explained with the help of output voltage waveform shown in the figure 2.

The harmonic spectrum analysis is carried out for the output voltage waveform of the three level inverter. From the figure 3 THD value obtained for the three level output voltage is 26.36%.When comparing the two level and three level harmonic spectrum analysis. Three level inverter is having the better quality of output.

Fig 1. Three level Inverter

Table 1. The switching scheme for three level inverter

## Switching State

## S1

## S2

## S3

## S4

## Vout

1

On

On

Off

off

+Vdc

0

On

Off

Off

on

0

-1

Off

Off

On

on

-Vdc

Fig 2. Output voltage waveform of three level Inverter

But overall the performance of the traditional inverters is not meeting the industrial requirements. Hence multilevel inverters are emerged.

Fig 3. Harmonic Spectrum for Output voltage of three level inverter

III. H-BRIDGE MULTILEVEL INVERTER

The traditional two or three levels inverter does not completely eliminate the unwanted harmonics in the output waveform. Therefore, using the multilevel inverter as an alternative to traditional PWM inverters is investigated.

In this topology the number of phase voltage levels at the converter terminals is 2N+1, where N is the number of cells or dc link voltages. In this topology, each cell has separate dc link capacitor and the voltage across the capacitor might differ among the cells. So, each power circuit needs just one dc voltage source. The number of dc link capacitors is proportional to the number of phase voltage levels .Each H-bridge cell may have positive, negative or zero voltage. Final output voltage is the sum of all H-bridge cell voltages and is symmetric with respect to neutral point, so the number of voltage levels is odd.

Cascaded H-bridge multilevel inverters typically use IGBT switches. These switches have low block voltage and high switching frequency.

Consider the seven level inverter; it requires 12 IGBT switches and three dc sources. The power circuit of inverter is shown in the figure 4. A cascaded H-bridges multilevel inverter is simply a series connection of multiple H-bridge inverters. Each H-bridge inverter has the same configuration as a typical single-phase full-bridge inverter.

The cascaded H-bridges multilevel inverter introduces the idea of using Separate DC Sources (SDCSs) to produce an AC voltage waveform. Each H-bridge inverter is connected to its own DC source Vdc. By cascading the AC outputs of each H-bridge inverter, an AC voltage waveform is produced.

Fig 4. Cascaded H-bridge 7-level Inverter

By closing the appropriate switches, each H-bridge inverter can produce three different voltages: +Vdc, 0 and -Vdc.

Fig 5. Output Voltage of cascaded H-bridge seven level inverter

It is also possible to be modularized circuit layout and packaging because each level has the same structure, and there are no extra clamping diodes or voltage balancing capacitors. The number of switches is reduced using the new topology.

This circuit is simulated using the MATLAB software. The results are shown in the later sections in detail.

## IV.PROPOSED TOPOLOGY

The main objective is to produce the quality output voltage of the multilevel inverter with reduced number of switches. An important issue in multilevel inverter design is that the voltage waveform is near sinusoidal and the lower order harmonics are eliminated. A key concern in the fundamental switching scheme is to determine the switching angles in order to produce the fundamental voltage without generating specific lower order harmonics.

Fig 6 Proposed Power circuit for 7-level output

There are three modes of operation for the 7-level multilevel inverter. These modes are explained as below.

Powering Mode This occurs when both the load current and voltage have the same polarity. In the positive half cycle, when the output voltage is Vdc, the current pass comprises; the lower supply, D6, Q1, load, Q4, and back to the lower supply. When the output voltage is 2Vdc, current pass is; the lower source, Q5, the upper source, Q1, load, Q4, and back to the lower source. In the negative half cycle, Q1 and Q4 are replaced by Q2 and Q3 respectively.

Free-Wheeling Mode Free-wheeling modes exist when one of the main switches is turned-off while the load current needs to continue its pass due to load inductance. This is achieved with the help of the anti-parallel diodes of the switches, and the load circuit is disconnected from the source terminals. In this mode, the positive half cycle current pass comprises; Q1, load, and D2 or Q4, load, and D3, while in the negative half cycle the current pass includes Q3, load, and D4 or Q2, load, and D1.

Regenerating Mode In this mode, part of the energy stored in the load inductance is returned back to the source. This happens during the intervals when the load current is negative during the positive half cycle and vice-versa, where the output voltage is zero. The positive current pass comprises; load, D2, Q6, the lower source, and D3, while the negative current pass comprises; load, D1, Q6, the lower source, and D4.

From the figure 7 switching pattern for the various switches are explained. In this paper fundamental frequency switching scheme is employed which reduces the switching losses. Because the switching frequency is less in this method when compared to the other methods. Switching losses are directly proportional to the switching frequency.

Fig 7 Waveforms of the proposed seven level inverter

V.SELECTIVE HARMONICS ELIMINATION

The Selective Harmonic Elimination Stepped-Waveform (SHESW) technique is very suitable for a multilevel inverter circuit. Employing this technique along with the multilevel topology, the low Total Harmonic Distortion THD output waveform without any filter circuit is possible.

A.Fourier series and Harmonics Elimination theory

After applying Fourier theory to the output voltage waveform of multilevel converters, which is odd quarter-wave symmetric, we can find the Fourier expression of the multilevel output voltage as (1). If the DC voltages are equal in the multilevel converter, the equation for the fundamental frequency switching control method can be expressed as:

(1)

From the equation, it can be seen that the output voltage has no even harmonics because the output voltage waveform is odd quarter-wave symmetric. It also can be seen from (2) that the peak values of these odd harmonics are expressed in terms of the switching angles Î¸1 ,Î¸2, â€¦ and Î¸s. Furthermore, the harmonic equations produced from (2) are transcendental equations.

Based on the harmonic elimination theory, if one wants to eliminate the nth harmonic, then

(2)

That means to choose a series of switching angles to let the value of the nth harmonic be zero. Therefore, an equation with s switching angles will be used to control the s different harmonic values. Generally, an equation with s switching angles is used to determine the fundamental frequency value, and to eliminate s-1 low order harmonics.

For an equation with three switching angles, (2) becomes

(3)

B. Transcendental Equations to solve

In this paper we derived harmonic equations for eliminating the 3rd and 5th order harmonics. The resulting harmonic equations are:

(4) (5)

(6)

To simplify the expression, (4) can be written as

m (7)

Where

(8)

These harmonic equations (4)-(6) are transcendental equations. They are difficult to solve without using some sort of numerical iterative technique. Here Newton Raphson method is employed for solving these equations.

C.Solving the harmonic equations using Newton Raphson method

To solve the harmonic equations by resultant theory, they must be changed into polynomials. First, change the variables,

(9)

(10)

and

(11)

Also, use the following trigonometric identities:

(12)

(13)

Then, apply them to the transcendental harmonic equations above, and the following polynomial harmonic equations can be found.

For the fundamental frequency harmonic:

(14)

For the 3rd harmonic:

(15)

For the 5th harmonic:

(16)

The polynomial equations can be solved by using the Newton Raphson method. The following are steps for solving the equations. Substitute the initial guesses for variables. Then form the jacobian matrix with newton's formula. Repeat the same steps until the solutions to converge. Thus the solutions obtained are given below

VI.SIMULATION WORK

The MATLAB simulation circuit was developed for the conventional seven level and proposed inverter with SHE implementation.

A.Simulation of the conventional seven level inverter

This circuit consists of 12 IGBT switches with 3 equal dc sources. The gate pulses are generated by using the pulse generator. The single phase capacitor-start induction motor is used as a load.

Fig 8 Simulation Model for conventional seven level Inverter

Fig 9. Harmonic spectrum of Output voltage of seven level H-bridge inverter

From the harmonic analysis of seven level output voltage of the 12 switch H-bridge inverter, the THD value is obtained as 34.43%.

B.Simulation of the Proposed Inverter Topology

The Simulink model diagram for the proposed circuit is shown in figure 10.It has only seven switches and same load is used. Gate pulses are generated by the combination of XOR gates and pulse generators.

From the figure 11 it is clear that seven level or three stepped waveform is obtained. Then harmonic analysis is carried out with the induction motor.

Fig 10 Simulation model for Proposed Inverter

Vol t

age

Time(sec)

Fig 11 Seven level output voltage of proposed Inverter

Fig 12. Harmonic spectrum of output voltage of the proposed inverter

From the table 3 different inverter THD values are compared. The proposed inverter THD value is obtained as 11.16%, which is the best among all. This shows that quality of the seven level inverter is improved.

C.Results Analysis

Table 3 THD comparison

Kind of the MLI

2 Level MLI

3 Level MLI

7 Level Conventional MLI

7 Level Proposed MLI with motor load

THD

38.68%

26.35%

34.60%

11.16%

VII.CONCLUSION

Compared to typical PWM switching schemes, multilevel fundamental switching will lead to lower switching losses. As a result, using the multilevel fundamental frequency switching scheme will lead to increased efficiency.

This paper is presented a procedure to selectively eliminate certain harmonics in a multilevel inverter utilizing the multilevel fundamental frequency switching scheme. Numerical techniques, Newton Raphson method is presented in this paper require an initial guess in order to find a solution.

For a cascaded H-bridges multilevel inverter utilizing three equal dc sources, most of the time the switching angles can be selected such that the output voltage THD is less than 12%. Thus by using the proposed scheme THD and switching losses are reduced.

VIII.REFERENCES

Ayoub Kavousi, Behrooz Vahidi, Reza Salehi, Mohammad azem Bakhshizadeh, Naeem Farokhnia and S.Hamid Fathi,(april 2012) "Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters", IEEE Transactions on power electronics, vol. 27, no. 4, pp1689-1696.

Damoun Ahmadi, KeZou, Cong Li, Yi Huang and Jin Wang,(october 2011) "A Universal Selective Harmonic Elimination Method for High-Power Inverters", IEEE Transactions on power electronics, vol. 26, no. 10,pp2743-2752,.

FaeteFilho, Leon M. Tolbert, Yue Cao and BurakOzpineci,(september/October 2011) "Real-Time Selective Harmonic Minimization for Multilevel Inverters Connected to Solar Panels Using Artificial Neural Network Angle Generation",IEEE Transactions on industry applications, vol. 47, no. 5, pp2117-2124.

Hossein Sepahvand, Jingsheng Liao and Mehdi Ferdowsi,(november 2011) "Investigation on Capacitor Voltage Regulation in Cascaded H-Bridge Multilevel Converters With Fundamental Frequency Switching", IEEE Transactions on industrial electronics, vol. 58, no. 11,pp5102-5111.

Jason R. Wells, XinGengPatrick L. Chapman Philip T. Kreinand Brett M. Nee,(january 2007) "Modulation-Based Harmonic Elimination", IEEE Transactions on power electronics, vol. 22, no. 1,pp336-340.

J. Napoles, A. J. Watson, J. J. Padilla, J. I. Leon, L. G. Franquelo, P. W. Wheeler and M. A. Aguirre,(june 2012)"Selective Harmonic Mitigation Technique for Cascaded H-Bridge Converters with Non-Equal DC Link Voltages", IEEE Transactions on power electronics,pp1-9.

John N. Chiasson, Leon M. Tolbert, Keith J. McKenzieand Zhong Du,(march 2004) "A Unified Approach to Solving the Harmonic Elimination Equations in Multilevel Converters",IEEE Transactions on power electronics, vol. 19, no. 2, pp478-500.