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In this paper we present the modeling of on-chip monolithic inductors used in standard CMOS process using COMSOL Multiphysics. The models presented here include accurate estimation of Inductance, series resistance of coil, variation of resistance with respect to frequency and skin effect. The models of the substrate losses such as eddy current and parasitic capacitance were also incorporated using which the Q value can be estimated. We have also modeled the thermal effect of current flow through the coil. All these models are developed in 3 dimension and various approximations were made for faster computation without compromising the accuracy.
Keywords - Monolithic inductor, Q factor, eddy current. skin effect, parasitic capacitance.
Passive components are essential part of RF circuits. Among the passive components inductors plays an important role. Inductors can be either be on-chip or off-chip. Present days on-chip inductors are preferred due to technical as well as commercial reasons. In VLSI circuits, on-chip inductors are designed using interconnecting metals. The value of inductance is mainly depends on its geometry. On-chip inductors are designed in many ways. Circular shape inductors are the most efficient type as its series resistance is less compared to other types. But square shaped inductors are most widely used as most of the EDA tools support this type of Manhattan style of dimensions. In this paper, we considered square shaped inductor for design and analysis. The main problem with on-chip inductor is its low quality factor. The losses in inductor can be classified into metal losses and substrate losses. The metal losses are further classified in to resistive losses, losses due to skin effect and current crowding on the edges. The substrate losses are due to parasitic capacitance, eddy current and displacement current losses [1-10].
In this paper, first we discuss about the modeling and designing of inductors using COMSOL Multiphysics . Then we discuss about the modeling and calculation of parasitic capacitance. In the next section, we discuss about the skin effect and eddy current losses. Finally, we discuss about the modeling of thermal effect on the inductors.
II. INDUCTOR DRAWING USING CAD
The inductor geometry can be drawn either using the CAD tool available in COMSOL Multiphysics or importing DXF, GDS, STL and VRML files from standard CAD software. We can use the same geometry for all our analysis.
In this paper for our study and analysis, we consider the standard square inductor as shown in the fig 1. The technical detail of the inductor is as follows:
Outer dimension (Âµm) - 210
Trace width (Âµm) - 10
Inter-winding space (Âµm) - 20
Number of turn - 4
The distance between substrate
and inductor (Âµm) - 30
Fig. 1 Square Inductor
III. CALCULATION OF INDUCTANCE
The purpose of the model is to calculate the self-inductance of the spiral. Given the magnetic field, we can compute the self-inductance, L, from the relation
L = 2Wm / I2 (1)
where Wm is the magnetic energy, and I is the current. This model includes a boundary condition that sets the current to 1.
The model geometry consists of the square inductor as mentioned above and the SiO2 surrounding it.
The model equations are the following:
-â-¼ . (Ïƒâ-¼V - Je) = 0 (2)
â-¼ x (Âµ0-1Âµr-1â-¼ x A) + Ïƒâ-¼V = Je (3)
In the equation above, Ïƒ denotes the electrical conductivity, A the magnetic vector potential, V the electric scalar potential, Je the externally generated current density vector, Âµ0 the permeability of vacuum and Âµr the relative permeability [12-13].
This model solved in 3D magnetostatics mode.
The electric conductivity in the coil is set to 58.1 x 106 S/m and 1 S/m in SiO2. The conductivity of SiO2 is arbitrarily set to a small value in order to avoid singularities in the solution, but the error becomes small as long as the value of the conductivity is small.
The post processing plot is as shown in Fig 2:
The value of self inductance for the geometry considered is 2.99nH. In the graph, we can clearly see the change in electrical potential.
IV. CALCULATION OF PARASITIC CAPACITANCE
The parasitic capacitance is one of the major source of substrate loss. The purpose of the model is to calculate the parasitic capacitance of the on-chip inductor to substrate [12-13]. To solve this problem, we use 3D Electrostatics application mode.
Fig. 2 Magnetic flux density graph of the Inductor
The domain equations are as follows:
The electric scalar potential, V satisfies Poisson's equation,
-â-¼ . (Îµ0Îµr â-¼V) = Ï (4)
Where Îµ0 is the permittivity of free space, Îµr is the relative permittivity and Ï is the space charge density. The electric field and the displacement are obtained from the gradient of V:
E = - â-¼V (5)
D = Îµ0Îµr E (6)
Potential boundary conditions are applied to the inductor and the substrate. A port condition maintains the potential 1 V at the inductor plane whereas the substrate is kept at ground potential.
The capacitance obtained for the geometry chosen is 0.1pF.
V. EDDY CURRENT LOSS ON SUBSTRATE
Induced eddy currents and associated thermal load is modeled here. The model is designed in 3D, Quasi-static, Magnetic, induced currents mode[12-13]. The inductor modeled as a line current of 100A,
In magnetic vector potential is calculated from
(jÏ‰Ïƒ - Ï‰2Îµ)A + â-¼ x (1/Âµ â-¼ x A) = 0 (7)
Where Ïƒ is the conductivity, Îµ the permittivity and Âµ the permeability.
An important parameter in eddy current modeling is the skin depth, Î´.
Î´ = âˆš2/Ï‰ÂµÏƒ (8)
The distribution of the dissipated power Pd can be calculated from
Pd = 1/2 (Js . E*) (9)
Where Js is the induced surface current density, and the asterisk denotes the complex conjugate.The total power dissipated was obtained from integration through the substrate. The eddy current loss for the geometry considered is 2.04 x 10-12 W. Using this model, we can study the eddy current losses due to different metal plane.
VI. CALCULATION OF SERIES RESISTANCE AND SKIN EFFECT
The conductivity and geometry of inductor metal layers have a strong influence on the quality factor of the resulting inductor. Resistive losses in the metal winding are an immediate consequence of the finite metal layer conductivity. The DC resistance of the spiral can be computed as the product of sheet resistance and number of squares in the spiral. However, at higher frequencies the resistance of the spiral increases due to skin effect. We can model the sheet resistance, skin effect and change in resistance due to change in frequency in 2D Quasi-statics, perpendicular induction current mode.
The model equation is as follows:
(jÏ‰Ïƒ - Ï‰2Îµ0)A + â-¼ x (Âµ0-1â-¼ x A - M) - Ïƒv x (â-¼ x A) + (Ïƒ + j Ï‰Îµ0) â-¼V = Je + jÏ‰P (10)
The post processing plot showing the skin effect in Fig 3.
Fig.3. Skin effect of the metal at 1GHz
The frequency vs resistance graph for Al and Cu are shown in Fig. 4 and Fig .5 respectively.
Fig. 4 Frequency vs Resistance for Al metal.
Fig. 5 Frequency vs Resistance for Cu metal.
It can be noted that the difference in resistance between Al and Cu at higher frequencies is much less compared in lower frequencies. Due to skin effect at higher frequencies, there is not much difference in interconnect resistance of Al and Cu metal layer.
VII. INDUCED HEATING OF THE METAL
The induced currents in a copper metal produce heat and when the temperature rises, the electric conductivity of copper changes. Solving the heat transfer simultaneously with field propagation will describe this process.
The system can be described by
JÏ‰Ïƒ(T)A + â-¼ x (Âµ-1 â-¼ x A) = 0 (11)
ÏCp âˆ‚T/âˆ‚t - â-¼ . kâ-¼T = Q(T,A) (12)
where Ï is density, Cp is the specific heat capacity, k is the thermal conductivity and Q is the inductive heating.
The electric conductivity of copper, Ïƒ is given by the expression
Ïƒ = 1/ [Ï0(1+ Î± (T-T0))] (13)
where Ï0 is the resistivity at the reference temperature T0 = 293 K, Î± is the temperature coefficient of the resistivity, and T is the actual temperature in the domain.
This model helps us to study the effect of temperature on conductivity which helps us to study the effect of temperature on other losses through the conductivity.
The inductor is modeled using COMSOL Multiphysics. The eddy current losses in the substrate, the parasitic capacitance, series resistance of inductance as well as the variation of conductivity due to temperature are also modeled. The parasitic capacitance, series resistance of inductor, eddy current loss are used to calculate the Q-factor of the inductor. These models can be used to optimize the inductor design and its Q factor.
 Ji Chen and Juin J. Liou, "On-Chip Spiral Inductors for RF Applications: An Overview", JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.4, NO.3, SEPTEMBER, 2004.
 J. N. Burghartz, D.C. Edelstein, M. Soyuer, H. A. Ainspan, and K. A.Jenkins, "RF Circuit Design Aspects of Spiral Inductors on Silicon," IEEE J. of Solid State Circuits, vol. 33, no. 12, pp. 2028-2034, Dec. 1998.
 Y. K. Koutsoyannopoulos and Y. Papananos, "Systematic analysis and modeling of integrated inductors and transformers in RF IC design," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 47, no. 8, pp. 699-713, Aug. 2000.
 Paolo Arcioni, Rinaldo Castello, Luca Perregrini, Enrico Sacchi, and Francesco Svelto, "An Innovative Modelization of Loss Mechanism in Silicon Integrated Inductors,"IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 46, no. 12, pp. 1453-1460, Dec. 1999.
 C.P. Yue, S.S. Wong, "Physical modeling of spiral inductors on silicon," IEEE Trans. Electron Devices, vol. 47, pp. 560-568, Mar. 2000.
 P. Arcioni, R. Castello, L. Perregrini, and E. Sacchi, "Modeling of metal and substrate losses in CMOS and BiCMOS inductors for RFICs,"Microwave Journal, vol. 42, pp. 62- 74, Aug. 1999.
 J. Gil, H. Shin, "A simple wide-band on-chip inductor model for silicon-based RF ICs," IEEE Trans. Microwave Theory and Techniques, vol. 51, pp. 2023 - 2028, Sep. 2003.
 H. M. Greenhouse, "Design of planar rectangular microelectronic inductors," IEEE Trans. Parts, Hybrids, Pack., vol. PHP-10, pp. 101-109, June 1974.
 J. N. Burghartz, Progress in RF Inductors onSilicon-Understanding Substrate Losses, Digest of IEEE International Electron Devices Meeting, Pages 523-526, Dec. 1998.
 S. S. Mohan, M. del Mar Hershenson, S. P. Boyd, and T. H. Lee, "Simple accurate expressions for planar spiral inductances," IEEE Journal of Solid State Circuits, vol. 34, no. 10, pp. 1419-1424, Oct. 1999.
 COMSOL Multiphysics 3.4, COMSOL AB.
 Ali M. Niknejid and Robert G. Meyer, " Analysis, Design and Optimization of Spiral Inductors and Transformers for Si RF IC's" Journal of Solid State Circuits, vol. 33, no. 10, pp. 1470-1481, Oct. 1998.
 John R. Long and Miles A. Copeland, " The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's" Journal of Solid State Circuits, vol. 32, no. 3, pp. 357-369, March 1997.