This essay has been submitted by a student. This is not an example of the work written by our professional essay writers.
The manufacturing process of a p-n junction defines the properties of the device. The assignment discusses the abrupt junction theory, the resulting depletion layer and its capacitance Cdep. The goal of the assignment is to measure Cdep per unit area of the device. A circuit has been employed in which the diode is reverse biased and a Wayne Kerr Bridge is used to measure Cdep. A graph is plotted between 1/Cdep2 and the reverse voltage Vr. The device and the depletion layer parameters can be determined from the graph. The abrupt junction theory shows that in a reverse bias mode, the diode acts like a parallel-plate capacitor. The factors on which Cdep depends are critically analysed in the assignment. The property of variation in the capacitance with the reverse voltage makes the device useful for many applications.
A p-n junction is formed when a semiconductor layer in a p-type substrate is converted into n-type by adding donors, or, conversion of an n-type semiconductor layer into p-type by adding acceptors would also form a p-n junction  shown in Fig. 1 (Appendix 1).
Depletion or space charge region
The formation of a p-n junction causes the majority carriers (electrons in the n-side and holes in the p-side) to migrate across the junction. After diffusion they will combine with the majority carriers on both sides, electrons with holes in the p-side and holes with electrons in the n-side, and disappear. Therefore, a space charge region or depletion region will exist where the materials join . It thus consists of the fixed positive and negative charges shown in a rectangular form  in Fig. 2-a (Appendix 1).
The net or the compensated dopant densities in the p and n sides are generally taken as NA and ND respectively. In the p-type layer, for example, if there are significant concentrations of acceptor and donor, then NA will be the former minus the later .
Depletion layer properties 
Abrupt or step junction
An abrupt one-sided p+-n (or n+-p) junction is obtained when NA >> ND (or vice versa)  where p+ and n+ represent the heavily doped sides of the junction .
Energy band diagram at equilibrium
Fig. 3 (Appendix 1) illustrates a p-n junction band diagram at equilibrium. EC and EV of p and n sides bend towards the equilibrium value of EF near the junction. The far ends of the two sides remain neutral. In the depletion layer, the concentrations of hole and electron are very small. Figure shows that in the middle, EF is neither close to EC nor EV . Therefore, it is generally assumed that a depletion layer is depleted of both electrons and holes [1,3].
The electric field is only present in the depletion layer due to the ionized donor atoms in the region shown in Fig. 1-a,b (Appendix 1). The electric field is continuous in the depletion region  and is given by
where WDp and WDn are the extended distances of NA and ND respectively. The electric field is thus maximum at x = 0 and zero at the boundaries . Equating (1) and (2) gives
The equation (3) shows that the net charge on either sides of the junction, positive in the n-side and negative in the p-side, is equal . It also reveals that the depletion layer primarily penetrates into the lighter doping side while its width can be neglected in the heavily doped material [1,4].
Fig. 3 (Appendix 1) indicates that EC and EV are not flat. Thus a potential difference is present at the junction of the two dissimilar materials, called the built-in potential  Vbi (=Î¨bi or Î¦bi) given by
where ni is the electron-hole pairs density, k is the Boltzmann's constant = 1.38 Ã- 10-23 J/K  and T is the temperature. The voltage distribution  is shown in Fig. 2-c (Appendix 1). It has a continuous value in the depletion region but zero for x = 0. It is also constant for x â‰¤ -WDp & x â‰¥ WDn . As
so by integrating (1) and (2) and applying the above mentioned boundary conditions, we get
0 â‰¤ x â‰¤ -WDp (6)
WDn â‰¤ x â‰¤ 0 (7)
The built-in potential gives the area of the depletion region shown in Fig. 2-b (Appendix 1).
Depletion layer width
The total width of the depletion layer  Wdep will be
As voltage is continuous in the depletion layer, so equating (6) and (7) at x = 0  gives
where N is the lighter dopant density .
Depletion layer capacitance
A capacitance is present in the depletion layer in the form of a parallel-plate capacitor, because of the opposite sign fixed charges which are separated by a region of high-resistance , called the depletion-layer capacitance given by
where A is the area, Wdep is the depletion layer width and Cdep is the depletion layer capacitance. Fig. 4 (Appendix 1) shows that a p-n junction can be assumed as the two conductors separated by an insulator .
Reverse biasing a p-n junction
Fig. 5-a (Appendix 1) shows a p-n junction under reverse bias where Vr is the reverse voltage . When a diode is reverse biased, electrons in the n-side and holes in the p-side move away from the junction . The minority carriers, holes in the n-side and electrons in the p-side, move in the opposite direction due to which a small current flows in the junction. As a result, the voltage drop at the far ends will be very small and, thus, all the reverse voltage will appear across the junction. It is evident from the Fig. 5-b,c (Appendix 1) that there is an increase in the junction potential barrier from qVbi to q(Vbi + Vr) .
Depletion layer width under reverse bias
By replacing Vbi with Vbi + Vr  in the equation (9) gives
Depletion layer capacitance under reverse bias
Fig. 6 (Appendix 1) shows the depletion layer capacitance Cdep (=Cd) in the equivalent circuit  of a reverse biased diode, where rd is the junction resistance under reverse bias voltage Vr (=Vs). From the equation (10), the depletion layer capacitance per unit area of the junction  is
From equations (11) and (12), we get
which suggests a proportionality between Vr and 1/Cdep2 shown in Fig. 1 (Appendix 3). N can be determined from the slope of the line. The built-in potential can be found from the intercept of the line with the horizontal axis [1,2].
To measure the depletion layer capacitance as a function of the reverse voltage and, hence, to check the validity of an abrupt junction theory for a large Si p+-n diode .
Fig. 7 (Appendix 1) shows the circuit connected in the laboratory to measure the depletion layer capacitance.
DC power supply, 100kÎ© resistance (offers high impedance to the bridge), digital voltmeter, 1ÂµF capacitor (blocks dc entering the bridge), Wayne Kerr Bridge (digitally measures the values), large Si p+-n (NA>>ND) diode .
Connect the circuit shown in Fig. 7 (Appendix 1). Note the reverse bias voltage on DVM and the measured-depletion layer capacitance Cmeas on Wayne Kerr Bridge by varying the voltage from -30V to -2V, in steps of 2V, and from -2V to 0V in steps of 0.5V. Repeat the procedure to determine the circuit capacitance Ccir. In this case, the diode will be removed from the circuit. Calculate the depletion layer capacitance Cdep per unit area  as
The power supply should be set at its minimum value before the circuit is switched on. The voltage should not exceed -30V for the given diode .
By removing the diode from the circuit, the circuit capacitance remains constant for various values of the applied voltage = 80.02 pF. It is because the capacitance of a capacitor depends on
The dielectric thickness between the plates of a capacitor
The dielectric type
The surface area of the plates of a capacitor
 so none of these parameters changed with the applied range of the voltage.
Table 1 (Appendix 2) shows the diode C-V data .
Fig. 1 (Appendix 3) shows a graph between Vr and 1/Cdep2. The graph shows that the diode in a reverse bias acts like a capacitor whose capacitance varies inversely with the square root of the applied voltage [3,5]. So the experimental results are in accordance with the abrupt junction theory.
Fig. 1 (Appendix 3). The built-in potential of the junction can be determined by the intercept of the line with the horizontal axis . In this case, we will extrapolate the line towards the negative x-axis which gives Vbi = -1.0 V. Equation (9) shows that an increase in Vbi increases Wdep which in turn will decrease Cdep and vice versa.
The equation of the straight line of Fig. 1 (Appendix 3) is
so the slope of the line = 0.175 Ã- 1010 m4F-2V-1.
The slope of the line of Fig. 1 (Appendix 3) can also be determined by differentiating the equation (13) with respect to the reverse voltage  as
Slope = (16)
since NA >> ND thus N = ND.
ND can be determined from the equation (16) by putting the value of the slope in it and it comes ND = 6.723 Ã- 1019 m-3. It is obvious from the equation (4) that Vbi increases with an increase in ND or NA . This in turn will decrease Cdep by increasing Wdep, as mentioned above, and vice versa.
Wdep is calculated by the equation (11) for various values of Vr and tabulated in Table 2 (Appendix 2). Fig. 2 (Appendix 3) indicates that the depletion layer width increases with an increase in the reverse voltage. It is because the electric field proportionally increases with Vr . Thus, an increase in the width of the depletion layer is required so that the dissipation of large voltage drop can take place across it .
Fig. 3 (Appendix 3) shows a graph between Vr and 1/Cdep2. In this case, Cdep is calculated from the equation (12) and the data is tabulated in Table 3 (Appendix 2). The graph shows a direct relation between Vr and 1/Cdep2 which indicates the validity of the equation (12) for our data.
The depletion layer capacitance is one of the properties of the depletion layer that makes the device very useful to operate under reverse bias. The assignment focused on the measurement of Cdep and the factors on which it depends. There exists a direct relation between Wdep and Vr that makes the best use of the device as a variable capacitor. Proportionality between Vr and 1/Cdep2 enables the abrupt junction to be used as Varactor diode to modulate the frequencies in the communication networks. Moreover, the experimental results show that the depletion layer capacitance gives the information about the doping concentration and the built-in potential of the device. This gives rise to the fact that the device can be designed according to the requirement of capacitance under reverse bias.
Fig. 1 Fabrication of a p-n junction by diffusing an n-type impurity into a p-type material.
Fig. 2 At thermal equilibrium. (a) Space charge region. (b) Electric field in the depletion region. (c) Built-in potential of an abrupt junction.
Fig. 3 Energy band diagram at equilibrium.
Fig. 4 A parallel plate capacitor model.
Fig. 5 (a) A p-n junction under reverse bias (b) Energy band diagram at equilibrium Vr = 0 (c) Reverse biased energy band diagram.
Fig. 6 Equivalent circuit of a diode under reverse bias.
Fig. 7 Circuit diagram.