Virtual Platforms Design
The importance of Virtual Platforms in the drive towards ESL design methodologies - RLSI Essay
Abstract:
System on Chip (SoC) designers are now facing the peak effects of shrinking geometries of ICs and convergence of functionalities in to a single chip than ever before [9]. As the design shrinks to 45 nanometer technology, the outcome of the design becomes very complex to predict and almost impossible to verify. The interconnect delay has already exceeded than gate delays in Deep Sub Micron (DSM) technology. Now-a-days designers prioritize Time To Market (TTM) first, design optimization second, design cost third. The reuse of design is considered as last priority because of longer designing time of reusable modules [1]. In this document, the method to overcome the above said difficulties using virtual platforms,its importance, advantages and critical issues are discussed.
Introduction:
Reference [7] states “Two traditional methods - high-level functional design exploration in Matlab and/or C/C++ and low level performance design exploration in Register Transfer Level (RTL), using hardware description language for example VHDL or Verilog - cannot satisfy the requirements of efficient architecture design exploration. The high level models are not sufficiently connected to the implementation to give the required feedback from design choices. On the other hand, RTL models are too slow to execute and too laborious to develop for architecture design exploration purposes”.
Even though IP based design reuse methodology is in practice for SoC designs, it cannot satisfy the design complexity of present days Deep Sub Micron technology (DSM). In industrial terms it is known as “Productivity gap or design gap or design crisis”. It is the lack of growth in design efficiency of Electronic System Level (ESL) tools with respect to the growth in logic density. One of the reason for the exponential growth in logic density is the convergence of functionality, especially in mobile devices, from computing, communication and applications [9]. In this context, a new design methodology is essential to explore reuse methodology in the architectural level. The SoC industries have named this as platform based methodology.
A virtual platform is a generic architecture for both hardware and software that specifies both the set of reusable elements and and their interfaces as well as their interconnect structure of the global design [9]. It contains library of reusable components and pre-integrated blocks known
as Intellectual Properties (IP). It also have an effective design flow and it provides reusability in the architectural levels [9]. A complex system can be designed with less efforts in a shorter period of time. The users of the platform can develop derivatives from the existing platform in accordance with the requirements [2,4]. Usually a platform will be specific for a particular application. For example Texas Instrument's OMAP platform is specially designed for mobile hand held device applications such as web browsing [5].
Traditional SoC design has software development at the end of the design cycle. The software team has to wait until the hardware is ready to start debugging software [5]. The conventional application of virtual platform include fast prototyping [8] and easy architecture exploration or co-verification [3,6]. In platform based design methodologies, the system constraints are refined top down and the implementation characteristics delay and power consumption are abstracted bottom up [10]. Hence it is a combination of two approaches: “top down” and “bottom up”, it is meeting in the middle process. Top down is a refinement process on choosing the required library in accordance with the product specification. But, bottom up is a library building process [13].
Even though no exact classification is available, there are four main types of the platforms identified by the industry world. They are full application platform, processor or core centric platform, communication centric platform and highly programmable platform [13]. Platform include hardware platform, software platform and system platform. Hardware platform is the primary intelligent system and includes components such as CPU, memory, bus and so on. The software platform mainly includes Real Time Operating System (RTOS) which is responsible for task scheduling and intertask communication. A combination of hardware platform and software platform together forms a system platform, which can be the basic architecture and application software of a device such as a PDA [13].
Advantages of Virtual Platforms:
In a usual Electronic System Level (ESL) design, three criteria, but are orthogonal to each other have to be met, namely timing accuracy, simulation speed and development time [3]. A virtual platform is required to achieve all of these criteria to some degree [3].
A virtual platform enables designers to concentrate their development efforts on the content of the application, rather than on issues related to underlying data manipulation services or complex programming issues. It allows hardware-software co-design within a single organization, thus reduces the miscommunication between teams spread across the globe [9].
In reference [8], a virtual platform can help in three main ways. First, it can push post silicon issues to pre-silicon, thus facilitating early bug finding. Second, it can provide content sharing between pre and post silicon test and validation. Third, it can enable early software development on the prototyped system [8].
Platform Based Design flow guarantees high reuse of concepts such as architectures, blocks and IPs, which can be easily shared among different projects. It also provides strong customization on the target application of the lower abstraction layers, which is essential to achieve high performances in terms of speed, area and power, which are otherwise unreachable with generic multipurpose designs [11].
The research carried out in the MARCO GSRC [14, 15, 16] has identified the key benefits of the this methodology. Platform-based design
- is a structured methodology that actually limits the space of exploration, but provides superior results in the fixed time constraints of the design, and it offers an economically feasible design flow.
- provides a formal mechanism for identifying the most critical hand-off points in the design chain: a hand-off point can be between system companies and IC design companies and / or between IC design companies and IC manufacturing companies.
- eliminates costly design iterations because it fosters design reuse at all abstraction levels thus enabling the design of an electronic product by assembling and configuring platform components in a rapid and reliable fashion;
- provides an intellectual framework for the complete electronic design process.
A product family can be built around a product platform according to the market requirements. All the members in a product family belongs to the same basic platform, but with considerable configuration changes, such as buffer size, addition or deletion of protocols interfaces and so
on. Some industries view a product platform as not only an abstract level, but also as an architectural rule which define electrical, mechanical, geometrical and software interfaces between the platform components [17].
Critical Analysis:
Virtual platform design is not significantly earlier than FPGA based prototyping [3]. But it can still accelerate the software optimization process by providing the optimization facility at early
stages of development which prevents huge code modification after silicon fabrication in the conventional flow [3].
A virtual platform cannot validate hardware design directly, since the model is different from the original RTL code [3]. When a malfunction is detected in a virtual platform simulation, one cannot assure that the same error exists in the hardware design [3].
Building or modifying a model may take lot of time and training. Virtual platforms can be troublesome in architectural exploration. Modification of the architecture leads to modification of address space, software and IP functionalities. This implies that used modeling style, which is already optimized for virtual platforms are too inflexible for further modifications [6].
Reusable modules take more time to develop and are seldom the optional solution for any specific application [9]. The design team may have to reconfigure the parameters for the optimal performance.
A platform is a frozen architecture. The interfaces are standardized and the engineers are given some choices on configurations. The choices are limited in the beginning of a specific platform and then grow as time goes by until the architecture become obsolete. In today's world of technology, an architecture can become soon obsolete, thus nullifying the past efforts of designers. Even though platforms are described as flexible, they can only be configured to some extent [12]. Derivative designs can answer this problem up to some extend.
The platform can be act as a barrier to future innovation [17]. It is because a significant amount
of efforts, resources and design time are spent on development of platforms. Every organization
wants to reuse the platform as much as they can. It raises an interesting tension within each organization, as all investment is sunk into the product platform, there is a pressure to reuse them repeatedly [17].
“As a product platform is leveraged more-and-more over time, the capabilities of the platform is constantly challenged with each new variant derived from it. One may choose to keep extending the platform or one may choose to strictly enforce its current configuration and impose boundary conditions on new variants, in which case the variants may be overly constrained. If on the other hand one continues to continuously “stretch” the platform, it may eventually become overburdened, and it may be more efficient to split the platform into two or more platforms. Thus, in some cases deploying multiple platforms may actually be optimal. If the variety of functional requirements becomes too large, the platform may become too demanding to develop, too expensive to build and too complex to operate reliably” [17].
Conclusion:
Virtual platforms and platform based design methodology are receiving its ready acceptance in present SoC industries as it offers easy prototyping and least time to market. In this report, it is shown various studies in this field, and all this studies point to the fact that this methodology can greatly enhance design efficiency and can reduce design risks. It offers “correct-the-first-time” implementation. But this methodology is still in the beginning stage. IP libraries are under development. The initial establishment time is high. It has to grow more and become mature enough to support all features that it expected to do.
References:
[1]Kazutoshi Wakabayashi, member, IEEE, and Takumi Okamoto - “C-based SoC design flow and EDA tools: an asic and system vendor perspective” - pp. 1 - IEEE transactions on computer-aided design of integrated circuits and systems, Vol. 19, no. 12, December 2000
http://ieeexplore.ieee.org/iel5/43/19457/00898829.pdf?tp=&arnumber=898829&isnumber=19457
[2]Sanggyu Park and Soo-Ik Chae, “A two-week program for an Platform based SoC design”, Center for SoC Design Technology, Seoul National University, Seoul, Korea, Proceedings of the 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05), pp 1
http://ieeexplore.ieee.org/Xplore/login.jsp?url=/iel5/10090/32323/01509356.pdf?tp=&arnumber=1509356&isnumber=32323
[3]Sungpack Hongc, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam,et al, “Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study”, sp7.hong@samsung.com pp 1, 2, 4.
http://ieeexplore.ieee.org/iel5/4278477/4278478/04278521.pdf?tp=&arnumber=4278521&isnumber=4278478
[4]A.K. Kalekos, “ESL Design: More Than a Design Methodology A New Business Development Weapon ”, http://www.coware.com/images/esltoday/ESL_AK.html#jump
[5]Partner News, “Virtio Unveils Virtual Platform For TI OMAP 3 Platform ”, 17 February 2006, http://www.arm.com/iqonline/news/partnernews/12134.html
[6]Vesa Lahtinen, “System Level Design Experiences and the Need for Standardization”, Nokia, Technology Platforms, Tampere, Finland, vesa.lahtinen@nokia.com
http://ieeexplore.ieee.org/iel5/4116438/4116439/04116443.pdf?tp=&arnumber=4116443&isnumber=4116439
[7]Tero Rissa, Peter Y.K. Cheungt and Wayne Luk, “System Level Design Exploration of JPEG 2000 with SoftSONIC Virtual Hardware Platform”, Department of Computing, Department of Electrical and Electronic Engineering, Imperial College London, UK, {tero.rissa,w.luk,p.cheung}@ imperial.ac.uk, pp 1,
http://ieeexplore.ieee.org/iel5/4267031/4267032/04267128.pdf?tp=&arnumber=4267128&isnumber=4267032
[8]Priyadarsan Patra, Intel, “On the cusp of a validation wall”, pp 2, Copublished by the IEEE CS and the IEEE CASS, priyadarsan.patra@intel.com,
http://ieeexplore.ieee.org/iel5/54/4237480/04237500.pdf?tp=&arnumber=4237500&isnumber=4237480
[9]Theo A.C.M. Claasen, Executive Vice president, Technology and Strategy, Philips Semiconductors, Eindhoven - The Netherlands, “Platform Design: the next paradigm shift to deal with complexity”, pp 1,2,3.
http://ieeexplore.ieee.org/iel5/8875/28033/01252538.pdf?tp=&arnumber=1252538&isnumber=28033
[10]Alvis Bonivento and Alberto Sangiovanni-Vincentelli, University of California at Berkely, “Platform based design for wireless sensor networks”, alvise.alberto @eecs.berkeley.edu, pp. 1.
http://ieeexplore.ieee.org/iel5/9915/31522/01469994.pdf?tp=&arnumber=1469994&isnumber=31522
[11]Francesco lozzi, Luca Fanucci and Adolfo Giambastiani, “Fast Prototyping Flow for Sensor Interfaces”, Department of Information Engineering, University of Pisa, Pisa, Italy, francesco.iozzigiet.unipi.it, pp 2.
http://ieeexplore.ieee.org/iel5/11116/35631/01689978.pdf?tp=&arnumber=1689978&isnumber=35631
[12]Gary Smith, “Platform Based Design: Does it Answer the Entire SoC Challenge?”, Gartner Dataquest, 251 River Oaks Parkway, San Jose, CA , gary.smith@gartner.com, pp 1.
http://ieeexplore.ieee.org/iel5/9238/29281/01322513.pdf?tp=&arnumber=1322513&isnumber=29281&htry=31
[13]Li Lil, Minglun Gao I, Zuoren Cheng, Duoli Zhang and Shlvhuan He, “A New Platform-Based Orthogonal SoC Design Methodology”, Institute of VLSI Design, Nanjing University, Department of Physics, Nanjing, pp 1.
http://ieeexplore.ieee.org/iel5/8985/28526/01277578.pdf?tp=&arnumber=1277578&isnumber=28526&htry=31
[14]A. Ferrari and A. L. Sangiovanni-Vincentelli. “System Design: Traditional Concepts and New Paradigms”, Proceeding International Conferrence on Computer Design, pp 1-12, October 1999.
[15]K. Keutzer, S. Malik, A. R. Newton, J. Rabaey, and A. Sangiovanni-Vincentelli, “System level design: Orthogonalization of concerns and platform-based design”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 19(12), December 2000.
[16]Alberto Sangiovanni Vincentelli, The Edgar L. and Harold H. Buttner Chair of EECS, University of California at Berkeley, “Defining Platform-Based Design”, pp 1-5.
http://www.gigascale.org/pubs/141/platformv7eetimes.pdf, February 2002.
[17]Timothy W. Simpson and Tucker Marion, Olivier de Weck, Katja Hölttä-Otto, Michael Kokkolaras, Steven B. Shooter, “Platform-based design and development: Current trends and needs in industry”, ASME 2006 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference September 10-13, 2006, Philadelphia, Pennsylvania, USA, pp 1, 5, 8.
http://strategic.mit.edu/PDF_archive/3%20Refereed%20Conference/3_80-DETC2006-99229.pdf
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