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Phase Memory Ferroelectric
1. Introduction
The history of computer memory research is littered with failed concepts that offered great promise, but could not deliver for technical or economic reasons. Phase-change memory technology is a relatively simple concept and should not be expensive, once developed. It will be much faster and more radiation resistant than flash memory, and will last much longer.
In other words, regardless of whether phase change memory is implemented from the top down (lithography) or the bottom up (nano-wires); the underlying technology is likely to come standard, at least in top of the line machines, in the near future.
The PCM uses chalcogenide glass material to store data into the memory cell. [10] PRAM is not the first use of chalcogenide for storage. The same material is used in rewritable optical media (CD-RW and DVD-RW), in which a laser heats up a small spot on the disk's inner layer to between 300 and 600 degrees Celsius for an instant. That alters the arrangement of atoms in that spot and changes the material's refractive index in a way that can be optically measured.
PRAM uses electrical current instead of laser light to trigger the structural change. An electrical charge just a few nanoseconds in duration melts the chalcogenide in a given spot; when the charge ends, the spot's temperature drops so quickly that the disorganized atoms freeze in place before they can rearrange themselves back into their regular, crystalline order. Going in the other direction, the process applies a longer, less-intense current that warms the amorphous patch without melting it.
This energizes the atoms just enough that they rearrange themselves into a crystalline lattice, which is characterized by lower energy or electrical resistance. To read the recorded information, a probe measures the electrical resistance of the spot. The amorphous state's high resistance is read as a binary 0; the lower-resistance, crystalline state is read as a binary 1.
PCM enables data to remain intact when the power has been shut off. For decades, the chief medium here has been magnetic disk. But as computers get smaller and require more and quicker storage, disk drives are lagging behind in satisfying many users needs. [1]
1.1 History of PCM
Interest in chalcogenide materials began with the discoveries made in 1960 by a Lithuanian-American scientist, Stanford R. Ovshinsky, of Energy Conservation Inc., who proved that the materials called chalcogenic materials are suitable for both electronic and optical data storage.[1] For exploring the new memory technology of PRAM, he started a new company which he named OVONYX. The company today has licensed many large corporations in the optical memory industry.
His work was first reported in Physical Review Letters in a much cited paper in 1968. In July 1969, at a Gordon Conference, he described an optical memory which utilized the phase change of the Ovonic electrical memory except that it was laser controlled. He had previously shown that these materials also responded to electron beam, electronic flash, etc. and that one could, in fact, have gray scale in these materials, both electrically and optically, and that spot sizes down to less than 100 angstroms could be reversibly written and erased. The Ovonic phase change optical memory has since become ubiquitous and is now commonly referred to as Phase Change (PCE) memory.[16]
1.2 Other Emerging Technologies
1.2.1 Ferro Electric Random Access Memory (FeRAM)
FeRAM is a type of non-volatile computer memory. It is similar in construction to DRAM, which is currently used in the majority of a computer's main memory, but uses a ferroelectric layer to achieve non-volatility. FeRAM is currently one of several advanced non-volatile memory (NVRAM) technologies that are attempting to gain acceptance as an alternative to flash by avoiding its key weaknesses – high program and erase voltages, slow programming speed, write-erase endurance that is limited to ~105 cycles.
The 1T-1C storage cell design in an FeRAM is similar in construction to the storage cell in widely used DRAM in that both cell types include one capacitor and one access transistor. In a DRAM cell capacitor a linear dielectric is used whereas in an FeRAM cell capacitor the dielectric structure includes ferroelectric material, typically lead zirconate titanate (PZT).
As shown in the figure 3, a ferroelectric material has a nonlinear relationship between the applied electric field and the apparent stored charge. Specifically, the ferroelectric characteristic has the form of a hysteresis loop, which is very similar in shape to the hysteresis loop of ferromagnetic materials.
You can get expert help with your essays right now. Find out more...When an external electric field is applied across a dielectric, the dipoles tend to align themselves with the field direction, produced by small shifts in the positions of atoms and shifts in the distributions of electronic charge in the crystal structure. After the charge is removed, the dipoles retain their polarization state. Typically binary "0"s and "1"s are stored as one of two possible electric polarizations in each data storage cell.
For example, in the figure a "1" is encoded using the negative remnant polarization "-Pr", and a "0" is encoded using the positive remnant polarization "+Pr". Generally the operation of FeRAM is similar to ferrite core memory, one of the primary forms of computer memory in the 1960s. In comparison, FeRAM requires far less power to flip the state of the polarity, and does so much faster. [17]
1.2.2 Magneto Resist Random Access Memory (MRAM)
MRAM is a non-volatile computer memory (NVRAM) technology, which has been under development since the 1990s. Continued increases in density of existing memory technologies - notably Flash RAM and DRAM - kept MRAM in a niche role in the market, but its proponents believe that the advantages are so overwhelming that MRAM will eventually become dominant. Unlike conventional RAM chip technologies, in MRAM data is not stored as electric charge or current flows, but by magnetic storage elements.
As shown in figure 4, the elements are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity; the other's field will change to match that of an external field. A memory device is built from a grid of such "cells". Reading is accomplished by measuring the electrical resistance of the cell.
A particular cell is selected by powering an associated transistor which switches current from a supply line through the cell to ground. Due to the magnetic tunnel effect, the electrical resistance of the cell changes due to the orientation of the fields in the two plates. By measuring the resulting current, the resistance inside any particular cell can be determined, and from this the polarity of the writable plate.
Typically if the two plates have the same polarity this is considered to mean "0", while if the two plates are of opposite polarity the resistance will be higher and this means "1". MRAM has similar speeds to SRAM, similar density of DRAM but much lower power consumption than DRAM, and is much faster and suffers no degradation over time in comparison to Flash memory. In comparison, MRAM is still largely in development, and being produced on older non-critical fabrications.
It may be that vendors are not prepared to take the risk of allocating a modern fabrication to MRAM producing when such fabrications cost a billion dollars to build and they have guaranteed sales producing Flash and DRAM memories, which are massively in demand.[18]
1.2.3 Silicon-Oxide-Nitride-Oxide-Silicon (SONOS)
SONOS, short for Silicon-Oxide-Nitride-Oxide-Silicon, is a type of high-performance non-volatile computer memory. It is similar to the widely used Flash RAM, but offers lower power usage and a somewhat longer lifetime. SONOS is being developed as one of a number of potential Flash replacements, and is currently used in Cypress Semiconductor's PSoC line of products. SONOS "cells" consist of a standard NMOS transistor with an additional layering of insulators on the gate (the transistor's "switch").
Figure 5 shows that the layering consists of an oxide layer approximately 2 nm thick, a silicon nitride layer about 5 nm, and a second oxide layer with a thickness between 5 and 10 nm. When the gate is biased positively, electrons from the source-drain circuit "above" the layer tunnel through the oxide layer and get trapped in the silicon nitride. This results in an energy barrier between the drain and the source, raising the threshold voltage Vt (the gate-source voltage necessary for current to flow through the transistor).
The electrons can be removed again by applying a negative bias on the gate. A SONOS memory device is constructed by fabricating a grid of SONOS transistors along with a small amount of control circuitry. After storing or erasing the cell, the controller can measure the state of the cell by passing a small voltage across the source-drain pair; if current flows the cell must be in the "no trapped electrons" state, which is considered to mean "0". If no current is seen the cell is in the "1" state. [19]
Phase-change material property ref.12
Phase Change Material Property
The phase change material is chalcogenide glass material which is the combination of elements form group 6 of the periodic table of elements. The phase change memory cell is made up of the phase change material having composition of the germanium, tungsten and tellurium. The atomic structure of the composition gives easy amorphising characteristic of the phase change memory. In the alloy lattice structure the atoms are connected through the covalent bond when high temperature is applied above the melting point the material gets liquidized. In the liquid state the atoms can cause linear structure. The sudden removal of the heat gets the material to freeze in to
the amorphous state. As in the crystalline state the atoms get activated and get sufficient energy to disorder in to the lattice structure. Thus due to its structure in the amorphous state it gives a very high resistance value. Generally Ge2Sb2Te5 alloy is used as a chalcogenide in phase change memory cell. The alloy is having melting point temperature of 650 degree centigrade. The glass transition is occurring at the temperature of 350 degree centigrade.
The curve shown in the [figure 7 ] shows the two current pulses required for phase change operation or programming the cell. The pulse of width t2 is the pulse required of average magnitude below melting point and for long duration. This generates enough heat to activate the atoms frozen in the amorphous state to re crystallize and thus does switching of the cell from amorphous state to the crystalline state. The chalcogenide material has some sufficient bad gap between amorphous state and crystalline state. The mobility of the carriers reduces in the amorphous state due to that it offers very resistance [10].
One most important characteristic of the chalcogenide material is the threshold switching of the chalcogenide alloy. [Figure 8] shows the current – voltage characteristic of the chalcogenide material. In the amorphous state due to disordered atoms in the alloy it offers very high resistance and in crystalline state the alloy offers very low resistance due to crystallized lattice structure. In the reset state (amorphous state) with the increase in the applied current the voltage increases.
But as the voltage increases above the threshold voltage the material switches in to the high conductive state reducing the voltage .But this conductive state requires the current pulse of enough duration to activate the atoms to crystallize in lattice structure. Thus a high current pulse for very short duration can cause the melting of the material within very few neon seconds. And then a steep falling edge of the electric pulse is required to freeze the material in the molten state before getting time to crystallize [10].
Functioning of phase-change memory
Find out how our expert essay writers can help you with your work...Pram Operation
As the name says the PRAM is made up of chalcogenide glass material. This is used to store the data in to binary logic one or logic zero in the memory cell. The very generally used alloy for chalcogenide glass is Ge(Germanium) , Sb (Tungsten) and Te(Titanium) ,members of group 6 in the periodic table. The same composition is being used widely in CD/DVD rewritable storage disks.
The application of laser beam on to the material can cause local heating of the material, being exposed to switch between crystalline and /or amorphous state. The same material alloy is alloy is also used in electrical storage devices like PRAM, PCRAM. The electrical signal of different magnitude and duration is passed through the heater material. This generates heat which can locally heat the material in contact with the heater element and cause switching of the chalcogenide between crystalline and amorphous state as shown in the (Figure[9]).
When electrical signal of high magnitude is applied to the cell of Phase Change memory the chalcogenide material in contact with the heater element melts. And then a speedy removal of the electrical signal gives the fast cooling to the melted material and the atoms which were disordered due to the high energy freezes and the material remains in the amorphous state. In this state due to imperfect lattice structure ,material’s resistivity increases and ,in turn offers very high overall resistance .Which represents Logical binary zero.
On the other hand while the electrical signal of low magnitude ,applied for a longer duration gives the energy to the atoms of the material which are already in disordered amorphous state and re arrange into the perfect lattice structure which is said to be as crystalline state of the material. In this state the resistivity of the material reduces drastically and offers very low resistance. This state is used to store logic one in to the memory cell. The graph shown in (figure 10) represents the current versus resistance graph of set to reset state and reset to state.
The value of the resistance changes with the application of the current. In (figure 10) for reset to state transition the material already being in the amorphous state (reset state) When current pulse is applied to the material goes above the value of 100 micro ampere .This current to the heater element causes sufficient heat to activate the material’s atoms to crystallize. So the resistivity of the material starts reducing resistance value. And when the material is in set (crystallized) state and the current of the higher magnitude is applied it switches the material to the amorphous state and increases the resistance to a very high value as shown in the (figure 10)[12].
The Detailed Reliability Study of the Phase Change Memories
Most of the non volatile memories face the problem of the data retention and, cross talk and endurance. The detailed study of the phase change memory reliability will prove it to be the strongest contender amongst all other new emerging memeory technologies. For the testing the model of the phase change memory was prepared as shown in the (Figure[11]).
The memory cell is made up of the Ge2 Sb2 Te5 also called as GST chalcogenide alloy sandwiched between upper metal electrode and lower metal heater element as shown in (Figure [9]). The application of the current pulse through the material causes the switching of material between two states amorphous and crystalline. The phase change memory cell is nothing but the thin film resistance attached with the access transistors and that can be switched between two states set and reset [11].
Amorphous state of the material said to be as reset state and crystalline state of material said to be as set state [10].The pulse generator was used to generate programming pulse and the electronic oscilloscope and the probe were used to measured the voltage and the current passed through the load resistance. The cell access MOS was used to limit the current during programming.
This is the model used for 180nm CMOS fabrication process. The current pulse of duration 40ns and with falling edge of 10ns was applied to switch the material from set to reset state and the current pulse of duration 100ns was applied to switch the material from reset to set state. And the model was tested for worst conditions for reliability testing. And the results strengthen merits of the phase change memeory.
The chalcogenide material was first switched in to the amorphous state and then at different temperature conditions the resistance of the material was measured to test the material for how much time it can store the data without any disturb. The graph of the results shown in the [Figure 12] shows that in the amorphous state up to 110 degree centigrade the data stored retains for at least 10 years. So in the actual expected condition of operation at 85 degree centigrade the cell used to store the data for more than 300 years.
This is a merit of phase change memory technology of long time data retention. Even the switching of the material is done in a very short period of time. This represents its fast operating speed. The model was also tested for endurance of the phase change memory cell. The continuous switching of the material was done by applying set and reset pulses programming pulses. And the time in terms of number of cycles for which the material can be switched without any major deviation in the set and reset state resistance was measured.
As shown in the (Figure 13) the study proves that cell can do healthy switching operation for operation cycles of 10^11. This result shows that the phase change memory cell is having very high endurance. For most of the memory technologies the read operation has proved to be destructive. For testing the effect of the read current on the phase change memory cell the read currents in the range of 1 to 60 MA were applied and for that the change in the resistance of the chalcogenide in different state were measured.
As per the (Figure 14) no change in the resistance was observed below 15 MA which is much higher than the actual read bias current used for reading the cell. So these results prove the immunity of the cell towards read disturbs. The cross talk between adjacent cells reduces the scaling of the memory cells. The phase change memory array was tested for the program and read disturbs caused to the adjacent cells by the operation on one cell.
The array structure shown in the (Figure 15) for five adjacent cells the change in the set and reset state resistances were measured for number of continuous program cycles. The results plotted in the figure 9 showed no significant change in the resistances of the adjacent memory cells for 10^10 continuous switching operation cycles of the main operation cell. This proved that the phase change memory cell is prone to the read and write disturbs [11].
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